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[Other resource] ethernet.tar

Description: 以太网10/100M IP核Verilog源码，可综合。-IP Ethernet 10/100 nuclear Verilog source can be integrated.
Platform: | Size: 934772 | Author: 箫勇天 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ethernet_verilog

Description: 这是一个很好的Verilog 编写的8位RISC CPU源码（可做为MCU），并且包括完整的C 语言的测试代码。-This is a very good preparation Verilog 8-bit RISC CPU source (available as MCU), and includes a complete C language test code.
Platform: | Size: 78848 | Author: 张念华 | Hits:

[Other Embeded program] ethernet.tar

Description: 以太网10/100M IP核Verilog源码，可综合。-IP Ethernet 10/100 nuclear Verilog source can be integrated.
Platform: | Size: 934912 | Author: 箫勇天 | Hits:

[VHDL-FPGA-Verilog] wb_conbus.tar

Description: wishbone 源代码，opencore-wishbone source code, opencore
Platform: | Size: 15360 | Author: 姚卫忠 | Hits:

[VHDL-FPGA-Verilog] ethernet__verilog

Description: fpga模拟以太网物理层的源代码，用verilog硬件描述语言开发。-FPGA simulation of the Ethernet physical layer of the source code, using Verilog hardware description language development.
Platform: | Size: 330752 | Author: 王贤 | Hits:

[VHDL-FPGA-Verilog] amba_verilog

Description: IC设计相关，arm内的AMBA桥实现的源码，verilog语言实现，-IC design, arm within the realization of the source AMBA bridge, verilog language,
Platform: | Size: 18432 | Author: 伊路发 | Hits:

[VHDL-FPGA-Verilog] MAC

Description: 10M/100M以太网mac子层802.3协议的源代码，包括半双工和全双工。-Mac sublayer 10M/100M Ethernet 802.3 protocol source code, including half-duplex and full duplex.
Platform: | Size: 122880 | Author: fiercewind | Hits:

[SCM] RedLogic_8019

Description: 使用RTL8019芯片进行以太网通讯的VERILOG源代码.-RTL8019 Ethernet chip to use the Verilog source code for communications.
Platform: | Size: 15483904 | Author: yan | Hits:

[Internet-Network] Verilog

Description: Verilog实现的以太网接口源程序代码-Realize the Ethernet interface Verilog source code
Platform: | Size: 129024 | Author: zhl | Hits:

[SCM] ethernet.tar

Description: 10M/100M以太网ipcore，包括说明文档和整个源码-10M/100M Ethernet ipcore, including documentation and the source
Platform: | Size: 936960 | Author: 李达明 | Hits:

[Other] EHERNETIPcore

Description: 该文件包含以太网IP核的相关代码，一共包含24个VERILOG源代码-This document contains the relevant Ethernet IP core code, a total of 24 includes Verilog source code
Platform: | Size: 69632 | Author: season | Hits:

[VHDL-FPGA-Verilog] DM9000A

Description: Verilog 编写的网卡DM9000A的IP核，altera公司寄的DE2系统中的源程序核-Verilog prepared DM9000A the IP core network card, altera company sent DE2 System source of nuclear
Platform: | Size: 16384 | Author: zhyy | Hits:

[VHDL-FPGA-Verilog] 10100MIP

Description: 以太网10100M IP核Verilog源码(可综合)\以太网10-100M IP核Verilog源码，可综合-10100M IP Ethernet core Verilog source code (which can be integrated) \ 10-100M IP Ethernet core Verilog source code can be integrated
Platform: | Size: 740352 | Author: 打狗队 | Hits:

[VHDL-FPGA-Verilog] ethernet_tri_mode.tar

Description: 基于verilog编写以太网激励程序源代码-Ethernet-based incentive program write verilog source code
Platform: | Size: 686080 | Author: 张鹏 | Hits:

[source in ebook] verilog

Description: verilog描述的以太网MAC层源代码，功能正确，已经在FPGA开发板上测试！需要的赶紧下-verilog description of the Ethernet MAC layer source code, function correctly, has been tested in the FPGA development board! Need to hurry the next! ! !
Platform: | Size: 56320 | Author: WangYong | Hits:

[VHDL-FPGA-Verilog] ethernet10-100M-IP-core

Description: 以太网10-100M IP核Verilog源码，可综合-Ethernet 10-100M IP core Verilog source code can be integrated
Platform: | Size: 740352 | Author: owen | Hits:

[TCP/IP stack] MAC_verilog

Description: 以太网MAC网卡的Verilog源代码，可以节省TCP/IP协议的设计开发时间。-Verilog source code for Ethernet MAC network card, you can save the TCP/IP protocol design and development time.
Platform: | Size: 125952 | Author: lxk | Hits:

[Other] Three-speed-Ethernet-Verilog-source

Description: Verilog的三速以太网源程序，文件中包含源程序和测试程序.-Three-speed Ethernet Verilog source
Platform: | Size: 130048 | Author: pang | Hits:

[VHDL-FPGA-Verilog] 以太网控制器Verilog源码(含有MAC,MII接口)

Description: 以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
Platform: | Size: 71680 | Author: 天地孤影i | Hits:

[VHDL-FPGA-Verilog] tcp_ip_core_w_dhcp_latest.tar

Description: 以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)
Platform: | Size: 152576 | Author: 翾飞FEI | Hits:
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