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Search - divider shift and subtract using verilog
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[
VHDL-FPGA-Verilog
]
32_16div
Description:
这是一个简单的除法器（32bit/16bit),采用移位相减法-This is a simple divider (32bit/16bit), using phase shift subtraction
Platform:
|
Size:
1024
|
Author:
郭勇谅
|
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Search - divider shift and subtract using verilog
Search - divider shift and subtract using verilog