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[Other resource] div5

Description: 简单的VERILOG五分频电路描述，可综合。已经过检验-simple verilog 0.2-frequency circuit description can be integrated. Have been tested
Platform: | Size: 932 | Author: 李四 | Hits:

[Windows Develop] mpg_ss

Description: VOD实用工具,可以从MPG文件之中, 分离视频和音频, 视频直接压缩保存DIV5格式, 音频直接保存为WAV格式, 支持双音轨 必须预先安装DSHOW组件 (AX文件:REGSVR32 /C /S [FILENAME].AX) -VOD practical tool that can MPG document, separate video and audio, video compression preservation DIV5 direct format, audio stored directly to WAV format, and supports dual-track must be pre-installed DSHOW components (AX documents : gating / C / S [FILENAME]. AX )
Platform: | Size: 743862 | Author: 夏永明 | Hits:

[Other Embeded program] div5

Description: 简单的VERILOG五分频电路描述，可综合。已经过检验-simple verilog 0.2-frequency circuit description can be integrated. Have been tested
Platform: | Size: 1024 | Author: 李四 | Hits:

[VHDL-FPGA-Verilog] div5

Description: 利用VHDL语言描述的5分频器（改变程序中m1,m2值，可作为任意奇数分频器）-The use of VHDL language is described in 5 prescaler (change procedure m1, m2 value, can be used as arbitrary odd prescaler)
Platform: | Size: 252928 | Author: zfc | Hits:

[VHDL-FPGA-Verilog] div5

Description: 占空比为50 的5分频，描述语言为verilog，可以减少大家的时间!-the div5 which duty_cycle is 50, description language is verilog, can reduce your time!
Platform: | Size: 3072 | Author: 刘应平 | Hits:

[VHDL-FPGA-Verilog] Div5

Description: 用VHDL编写的奇数分频程序，简单明了，一看就懂。-Written in VHDL odd frequency program, simple and clear, one can understand.
Platform: | Size: 314368 | Author: 张卫平 | Hits:

[MPI] div5

Description: 用verilog描述的任意分频器，包括奇偶分频。-Any divider verilog description, including the parity divide.
Platform: | Size: 110592 | Author: 章泽良 | Hits:

[VHDL-FPGA-Verilog] div5

Description: fpga 5分频 verilog程序，有实战价值，思路清晰，其他奇数分频类似。-fpga 5 frequency Verilog procedures, real value, clear thinking, similar to other odd division.
Platform: | Size: 4422656 | Author: mr hu | Hits:

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