Search - direct digital synthesizer

[Develop Tools] DDSxingnenfenxi

Description: 介绍了直接数字频率合成器DDS(Direct Digital Synthesizer)的组成、工作原理及性能 -introduced a direct digital frequency synthesis DDS (Direct Digital Synthes izer) the composition, theory and performance
Platform: | Size: 56396 | Author: 1 | Hits:

[Post-TeleCom sofeware systems] DDScom

Description: 直接式数字锁相环频率合成器.用ELANIX公司SYSTEMVIEW运行.-direct digital PLL frequency synthesizer. SYSTEMVIEW ELANIX companies with operations.
Platform: | Size: 1024 | Author: a | Hits:

[Books] DDSchipAD9852andapplication

Description: 摘要文章介绍了直接数字频率合成器(DDS)的组成及工作原理，描述了DDS芯片 AD9852的功能特性，同时给出了AD9852在本地同步时钟中的应用。关键词 DDS AD9852 同步时钟 -Abstract This paper presents a direct digital synthesizer (DDS) the composition and working principle, describes the DDS chip AD9852 functional properties, at the same time gives the AD9852 clock synchronization in the local application. Key words DDS AD9852 synchronous clock
Platform: | Size: 106496 | Author: 梅名 | Hits:

[Books] DDS

Description: DDS直接数字频率合成器，有设计文档，大家交流学习-DDS Direct Digital Synthesizer, a design document, to facilitate the exchange of learning
Platform: | Size: 581632 | Author: hzx1959 | Hits:

[VHDL-FPGA-Verilog] FPGAddfs

Description: 基于FPGA的直接数字频率合成器的设计与实现.-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
Platform: | Size: 222208 | Author: 周真 | Hits:

[VHDL-FPGA-Verilog] vhdlddfs

Description: 用VHDL设计直接数字频率合成器-VHDL design with direct digital frequency synthesizer
Platform: | Size: 190464 | Author: 周真 | Hits:

[VHDL-FPGA-Verilog] dds

Description: 直接数字频率合成器，基于vhdl语言，在qartus II上实现，下载调试成功-Direct digital frequency synthesizer, based on the VHDL language, in qartus II achieved a successful download debugging
Platform: | Size: 316416 | Author: 浮云 | Hits:

[Other] dds

Description: 直接数字频率合成器中相位累加杂散，幅度量化杂散及DAC非线性杂散的功率谱密度曲线频谱图-Direct digital frequency synthesizer spurious accumulation phase, amplitude quantization spurious and non-linear DAC spurious power spectral density curve of the spectrum graph
Platform: | Size: 1024 | Author: 王莹莹 | Hits:

[VHDL-FPGA-Verilog] dds

Description: DDs直接数字频率合成器的源代码，其中包括采用IP核和普通两种方式-DDS Direct Digital Synthesizer source code, including the use of IP core and the general two ways
Platform: | Size: 1378304 | Author: 谭儆轩 | Hits:

[VHDL-FPGA-Verilog] EDA

Description: 本章介绍了两个EDA技术的综合应用设计实例:数字闹钟和直接数字频率合成器DDS。-EDA chapter describes the two technologies integrated application design example: digital alarm clock and direct digital synthesizer DDS.
Platform: | Size: 181248 | Author: 黄鹏曾 | Hits:

[VHDL-FPGA-Verilog] DDS_VHDL

Description: 基于FPGA的直接数字频率合成器（DDS）设计（源程序）-FPGA-based direct digital synthesizer (DDS) design (source code)
Platform: | Size: 236544 | Author: jacky | Hits:

[File Format] DDSdevelop

Description: 此为使用DDS直接数字频率合成器之设计报告,作者相当的详细介绍DDS之原理以及使用Altera之FPGA做设计,供使用者参考.-This is the use of DDS Direct Digital Synthesizer Design report, the authors considerable detail on the principle of DDS and the use of Altera
Platform: | Size: 676864 | Author: JERRY | Hits:

[SCM] DDS

Description: 《DDS 原理简介》，DDS即直接数字频率合成器原理简介及系统设计与实现- DDS Principle , DDS direct digital synthesizer Principle and System Design and Implementation
Platform: | Size: 454656 | Author: 范田田 | Hits:

[VHDL-FPGA-Verilog] FPGA_signal_general

Description: 摘要：介绍了直接数字频率合成 (DDS) 技术的基本原理，给出了基于Altera公司FPGA器件的一个三相正弦信号发生器的设计方案，同时给出了其软件程序和仿真结果。仿真结果表明：该方法生成的三相正弦信号具有对称性好、波形失真小、频率精度高等优点，且输出频率可调。关键词：直接数字频率合成；现场可编程门阵列；FPGA；三相正弦信号-Abstract: Direct Digital Synthesis (DDS) technology, the basic principles are given Altera-based FPGA devices the company a three-phase sinusoidal signal generator design program, at the same time give its software programs and simulation results. The simulation results show that: the method to generate three-phase sinusoidal signal with good symmetry, waveform distortion small, the frequency of high precision, and adjustable output frequency. Key words: direct digital synthesizer field programmable gate array FPGA three-phase sinusoidal signal
Platform: | Size: 101376 | Author: 赵文 | Hits:

[VHDL-FPGA-Verilog] ddsdds

Description: 直接数字频率合成，可以直接输出所需要的波形-Direct digital synthesizer, you can direct output of the waveform required
Platform: | Size: 1610752 | Author: wqq | Hits:

[Other] example10

Description: ：正弦波发生器例程，包括了直接数字频率合成(DDS)的原理以及如何应用CPLD产生频率可控频率的正弦信号。-: Sine wave generator routine, including a direct digital synthesizer (DDS), as well as the application of the principle of frequency control CPLD generated sinusoidal signal frequency.
Platform: | Size: 57344 | Author: 周平 | Hits:

[VHDL-FPGA-Verilog] CORDIC

Description: 数字控制振荡器（NCO，numerical controlled oscillator）是软件无线电、直接数据频率合成器（DDS，Direct digital synthesizer）、快速傅立叶变换（FFT，Fast Fourier Transform）等的重要组成部分，同时也是决定其性能的主要因素之一，随着芯片集成度的提高、在信号处理、数字通信领域、调制解调、变频调速、制导控制、电力电子等方面得到越来越广泛的应用。-Digital controlled oscillator (NCO, numerical controlled oscillator) is a software-defined radio, direct data on the frequency synthesizer (DDS, Direct digital synthesizer), Fast Fourier Transform (FFT, Fast Fourier Transform), such as an important component of the decision at the same time the performance of one of the main factors, along with the improvement of the chip integrated in the signal processing, digital communications, modulation and demodulation, frequency conversion speed control, guidance control, such as power electronics get more and more widely.
Platform: | Size: 4096 | Author: 司令 | Hits:

[VHDL-FPGA-Verilog] FPGA-DDC

Description: 基于FPGA的直接数字频率合成器的设计和实现。-FPGA-Based Direct Digital Frequency Synthesizer Design and Implementation.
Platform: | Size: 100352 | Author: 孙新荣 | Hits:

[VHDL-FPGA-Verilog] ddfsdemo

Description: 直接数字频率合成器（Direct Digital Frequency Synthesizer：DDFS）的VHDL程序,开发环境是QuartusII,系统时钟为50MHz，由PLL产生DDFS的工作时钟166.67MHz,地址位宽为24位，频率字为20，相位字为10，RAM用于存储查找表，其地址位宽为10，数据位宽为8。-Direct Digital Frequency Synthesizer ( DDFS) of the VHDL program, the development environment is QuartusII, the system clock to 50MHz, the work of DDFS generated by PLL clock 166.67MHz, address bit-width of 24-bit frequency word is 20, phase word for 10, RAM used to store look-up table, its address is 10 bits wide, the data is 8 bits wide.
Platform: | Size: 647168 | Author: 力文 | Hits:

[VHDL-FPGA-Verilog] ddfs

Description: 直接数字频率合成器，整个工程文件都在，仿真也有，直接就能用。-Direct digital frequency synthesizer, the entire project file are in the simulation is also directly be able to use.
Platform: | Size: 478208 | Author: 虎 | Hits:

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[Develop Tools] DDSxingnenfenxi

[Post-TeleCom sofeware systems] DDScom

[Books] DDSchipAD9852andapplication

[Books] DDS

[VHDL-FPGA-Verilog] FPGAddfs

[VHDL-FPGA-Verilog] vhdlddfs

[VHDL-FPGA-Verilog] dds

[Other] dds

[VHDL-FPGA-Verilog] dds

[VHDL-FPGA-Verilog] EDA

[VHDL-FPGA-Verilog] DDS_VHDL

[File Format] DDSdevelop

[SCM] DDS

[VHDL-FPGA-Verilog] FPGA_signal_general

[VHDL-FPGA-Verilog] ddsdds

[Other] example10

[VHDL-FPGA-Verilog] CORDIC

[VHDL-FPGA-Verilog] FPGA-DDC

[VHDL-FPGA-Verilog] ddfsdemo

[VHDL-FPGA-Verilog] ddfs

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