Description: VHDL课程的源代码数字密码锁的设计与实现的实验报告，内附源代码-VHDL source code for the course digital code lock design and implementation of the experimental report, included the source code Platform: |
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Author:CXJ |
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Description: 使用VHDL语言进行了数字密码锁的设计。文章中详细介绍了设计的要求、实验环境、完成的功能和详细的程序代码-Using the VHDL language digital lock design. The article describes in detail the design requirements, experimental environment, complete functions and a detailed code Platform: |
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Author:陈宇航 |
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Description: 数字密码锁的设计与实现
一．实验目的
1. 学习VHDL的综合设计应用
2. 学习数字密码锁的设计
二．实验内容
设计一个数字密码锁，对其编译，仿真，下载。
数字密码锁具体要求如下：
1.系统具有预置的初始密码“00000001”。
2.输入密码与预存密码相同时，开锁成功，显示绿灯，否则开锁失败，显示红灯。
3.具有修改密码功能。修改密码时，先开锁，开锁成功才可以修改。
4.系统同时具有关锁功能。关锁后，显示红灯。
5.密码由拔码开关表示，开锁由按键表示。
6具有一个复位按键。按键后，回到初始状态。
-VHDL Digital Design and Implementation of lock
1. Purpose of the experiment
1. VHDL Integrated Design and Application of Learning
2. Learning digital code lock design
2. Experimental content
Design a digital lock on their compilation, simulation, download.
Digital code lock specific requirements are as follows:
1. System has preset the initial password "00000001."
2. Enter the same password with the stored password, unlock successful, a green light, or unlock failed to show a red light.
3. With the change password function. Modify password, the first lock, unlock success can modify.
4. The system also has off lock. Shut up after the red light.
5. The password code from the pull switch that unlock the keys, said.
6 has a reset button. Button, the return to initial state.
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Author:爱好 |
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Description: EDA数字密码锁设计：基于FPGA芯片，采用VHDL语言设计，具有键入预设6位密码，3次出错报警，复位等功能。-EDA digital code lock design: Based on the FPGA chip using VHDL, type the default 6 with the password 3 times error alarm, reset and other functions. Platform: |
Size: 198656 |
Author:whai |
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Description: VHDL设计的相关实验，包括4位可逆计数器，4位可逆二进制代码－格雷码转换器设计、序列检测器的设计、基于ROM的正弦波发生器的设计、数字密码锁的设计与实现。-VHDL design of experiments, including four reversible counters, four reversible binary code- Gray code converter design, the sequence detector design, the ROM-based sine wave generator design, digital lock design and implementation. Platform: |
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Author:张联合 |
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Description: VHDL的一些实验代码，其中有4位可逆计数器，4位可逆二进制代码－格雷码转换器设计、序列检测器的设计、基于ROM的正弦波发生器的设计、数字密码锁的设计与实现-Some experiments of VHDL code, which has four reversible counters, four reversible binary code- Gray code converter design, sequence detection
Design, ROM-based sine wave generator design, digital design and implementation of lock Platform: |
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Author:张联合 |
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Description: 电子密码锁
基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术，以单片机为主要器件。在实际应用中，程序容易跑飞，系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法，采用VHDL语言对系统进行描述，并在EP3C10E144C8上实现。-password lock
FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks. At present, the electronic code lock is most used of SCM technology .In practice, however, the process easy run to fly. So the reliability of this system is poor. The paper introduced a field programmable gate arrays FPGA devices to design electronic password lock. The VHDL language is used to describe the system and achieved in EP3C10E144C8. Platform: |
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Author:zhu |
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Description: 基于FPGA设计的电子密码锁是一个小型的数字系统，与普通机械锁相比，具有许多独特的优点：保密性好，防盗性强，可以不用钥匙，记住密码即可开锁等。目前使用的电子密码锁大部分是基于单片机技术，以单片机为主要器件。在实际应用中，程序容易跑飞，系统的可靠性较差。本文介绍的一种基于现场可编辑门阵列FPGA器件的电子密码锁的设计方法，采用VHDL语言对系统进行描述，并在EP3C10E144C8上实现。
通过仿真调试，利用可编程逻辑器件FPGA的电子密码锁的设计基本达到了预期目的。当然，该系统在一些细节的设计上还需要不断地完善和改进，特别是对系统的扩展有很好的使用系统和设计的价值。-The Report Of Electronic Code Lock Design
Abstract：FPGA-based design of the electronic code lock is a small digital system. It has many unique advantages：good privacy and security , it do not need the key but remember password to unlock, and so on while it compare to ordinary mechanical locks. At present, the electronic code lock is most used of SCM technology .In practice, however, the process easy run to fly. So the reliability of this system is poor. The paper introduced a field programmable gate arrays FPGA devices to design electronic password lock. The VHDL language is used to describe the system and achieved in EP3C10E144C8.
Though the simulation tests, using FPGA-based design of the electronic code lock can achieve the expected goal. Of course, some of the details of the system in the design of the need to constantly refined and improved, in particular the expansion of the system have a good design and practical value.
Keyword: FPGA VHDL language electronic passw Platform: |
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Author:zhu |
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Description: 基于vhdl语言的数字密码锁设计，包含代码和顶层图-Contain code based on the the vhdl language of digital code lock design, and top chart Platform: |
Size: 118784 |
Author:张瑞萌 |
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Description: 数字锁的详细设计流程以及VHDL仿真过程和结果，附有源码-The detailed design process digital lock and VHDL simulation process and results, with source code Platform: |
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Author:WPQ |
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Search - digital lock vhdl code and design