Welcome![Sign In][Sign Up]
Location:
Search - digital clock source code for FPGA

Search list

[VHDL-FPGA-Verilogvhdl--timer

Description: 关于基于fpga的,数字化时钟vhdl实现源程序,推荐大家下载仿真实现。-On the FPGA-based, digital clock source VHDL realize recommend everyone to download simulation.
Platform: | Size: 6144 | Author: sxd | Hits:

[VHDL-FPGA-Verilogmultifunction_digital_clock_based_on_fpga

Description: 基于FPGA的多功能数字钟的设计与实现 内附有详尽的Verilog HDL源码,其功能主要有:时间设置,时间显示,跑表,分频,日期设置,日期显示等-FPGA-based multi-functional Digital Clock Design and Implementation of typhoons and rainstorms are detailed Verilog HDL source code, its functions include: time settings, time display, stopwatch, frequency, date setting, date display
Platform: | Size: 3293184 | Author: | Hits:

[VHDL-FPGA-Verilogdigitalwatch

Description: Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The experimental procedure in the source code for a detailed Notes-Describe: This is VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The experimental procedure in the source code for a detailed Notes
Platform: | Size: 92160 | Author: eric carmen | Hits:

[VHDL-FPGA-Verilogclock

Description: 多功能数字钟Verilog HDL的源码,能够整点报时,报整点数,设定任意时刻闹钟,低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
Platform: | Size: 984064 | Author: Stone Lei | Hits:

[VHDL-FPGA-Verilogen_ctrl(u)

Description: 此源码为基于FPGA的液晶屏显示的数字钟程序,程序包含强大的液晶显示控制模块。-The source code for the FPGA-based LCD screen display digital clock program, the program includes a powerful liquid crystal display control module.
Platform: | Size: 165888 | Author: 王强 | Hits:

CodeBus www.codebus.net