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Description: Freescale 发布的 DDR内存PCB布线指导
Platform: |
Size: 756566 |
Author: smartdo |
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Description: 用allegro画的ddr存储器电路。六层板设计，很好的参考资料-Allegro painting with ddr memory circuit. Six-storey plate design, very good reference
Platform: |
Size: 372736 |
Author: 朱宝军 |
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Description: Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
Platform: |
Size: 236544 |
Author: 王辉 |
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Description: DDR2时序规范，DDR·
DDR2时序规范，DDR·-DDR2 timing norms, DDR DDR2 timing norms, DDR
Platform: |
Size: 1933312 |
Author: yangjian |
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Description: Twister DDR EP1C6Q240 FPGA 开发板 原理图，PCB,BOM-Twister Board Documentation
Schematics, PCB and BOM
Rev. B
Platform: |
Size: 1452032 |
Author: SEED |
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Description: omap3530的datasheet，OMAP3530集成ARM+DSP+3D,ARM部分主频达到600MHZ，DSP采用430-MHz TMS320C64x+™ DSP Core，DDR可从128MB扩展到512M，尺寸基于7寸数字屏，主板由核心板和底板构成-omap3530 the datasheet, OMAP3530 integrates ARM+ DSP+3 D, ARM parts of speeds up to 600MHZ, DSP with 430-MHz TMS320C64x+ ™ DSP Core, DDR can be expanded from 128MB to 512M, size 7-inch digital screen on the motherboard from the core board and the floor constitute
Platform: |
Size: 2698240 |
Author: 林明 |
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Description: 关于DDR布线规范，用于指导PCB布线.-Wiring on the DDR specification, PCB layout for
Platform: |
Size: 1957888 |
Author: tl |
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Description: DDR 布线规则,pcb工程师应该多学习-DDR routing rules, pcb engineers should study more
Platform: |
Size: 44032 |
Author: 俩天 |
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Description: Document that may help PCB Designers which use the Speed2000: the tool of Allegro Sigrity.
Platform: |
Size: 1411072 |
Author: abuhajer |
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Description: ALLegro绘制PCB时需要进行规则设置，本文基于DDR给大家简要的说明了相关设置要点-ALLegro to rule set, when scale PCB based on DDR briefly illustrates the relevant set points for you
Platform: |
Size: 219136 |
Author: 564654654 |
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