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[VHDL-FPGA-Verilogzbt_rd_vhdl_str_v1.0.0

Description: ddr2 controller功能控制,里面有四个模块-ddr2 controller functions to control, which has four modules
Platform: | Size: 1688576 | Author: li ji wei | Hits:

[VHDL-FPGA-VerilogDDR_SDRAMDesignTutorials

Description: Altera公司的基于NIOSII设计DDR和DDR2内存的资料,很有帮助的,-Based on Altera' s DDR and DDR2 memory NIOSII design information, useful,
Platform: | Size: 3154944 | Author: iyoung | Hits:

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