Search - dct in verilog

[VHDL-FPGA-Verilog] two_d_dct_serial

Description: altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
Platform: | Size: 24576 | Author: 猪猪 | Hits:

[Compress-Decompress algrithms] 601792346200732319490634862

Description: jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Platform: | Size: 5120 | Author: wuguanying | Hits:

[Graph program] DCT-vhdl

Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Platform: | Size: 10240 | Author: liujl | Hits:

[2D Graphic] dct

Description: DCT的Verilog 程序，用QUARTUS进行开发-DCT-Verilog procedures developed by Quartus
Platform: | Size: 3124224 | Author: 张伟 | Hits:

[VHDL-FPGA-Verilog] DCT

Description: 用verilog语言实现DCT编解码附有DCT的说明-Using Verilog language realize DCT codec with a description of DCT
Platform: | Size: 65536 | Author: 周韧研 | Hits:

[VHDL-FPGA-Verilog] Dct_verilog

Description: 采用verilog hdl 语言实现整形dct算法，设计合理，算法简单，是红色逻辑开发板试验程序，值得一看。-Verilog hdl language used plastic realize DCT algorithm, rational design algorithm is simple and logical development board is red test procedures, worth a visit.
Platform: | Size: 4096 | Author: panyouyu | Hits:

[VHDL-FPGA-Verilog] DCT_1D

Description: 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper-One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the
Platform: | Size: 54272 | Author: 楚天 | Hits:

[Multimedia program] dct

Description: Mpeg2视频压缩时进行空间压缩时的离散余弦变换矩阵的verilog实现，采用modelsim验证-Mpeg2 video compression when space compression of discrete cosine transform matrix realize Verilog using ModelSim verification
Platform: | Size: 29696 | Author: mayang | Hits:

[SCM] dct_source_code

Description: DCT source code,verilog代码。有兴趣的可以参考下。-DCT source code, verilog code. Interested can refer to the next.
Platform: | Size: 26624 | Author: 小步 | Hits:

[OpenGL program] DCT

Description: 用Verilog HDL编写的离散余弦变换，可用于视频图像压缩，并在modelsim SE6.0中仿真通过-Verilog HDL prepared with discrete cosine transform can be used for video image compression, and modelsim SE6.0 simulation through
Platform: | Size: 1024 | Author: yangyanwen | Hits:

[Graph program] dct1234

Description: dct 变换编码的verilog语言程序，已经通过模拟仿真-DCT transform coding of the Verilog language program has been through simulation
Platform: | Size: 2048 | Author: zsb | Hits:

[Special Effects] butterfly-verilog

Description: VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful
Platform: | Size: 1024 | Author: zhaoyizhi | Hits:

[Compress-Decompress algrithms] verilog_dct_serial

Description: Verilog dct + description]-Verilog dct+ description]
Platform: | Size: 24576 | Author: asia | Hits:

[VHDL-FPGA-Verilog] main_dct

Description: verilog code for dct
Platform: | Size: 2048 | Author: dheeru | Hits:

[VHDL-FPGA-Verilog] yiweiDCTbianhuan

Description: 一维DCT变换的Verilog HDL源程序，在ISE中已经通过编译，可以参考里面的文档。-One-dimensional DCT transform Verilog HDL source code, in the ISE has been through the compilation, you can refer to inside the document.
Platform: | Size: 421888 | Author: 匡匡 | Hits:

[Compress-Decompress algrithms] DCTPROGRAM.ZIP

Description: it is verilog code for two dimentional dct
Platform: | Size: 18432 | Author: suhu | Hits:

[VHDL-FPGA-Verilog] dct

Description: all ok...4 Dec 2009 ... In this method the 2-Dimensional DCT is obtained by taking two ... column-wise 1D DCT is ascertained which gives the 2D DCT of the data. ... The design is done in Verilog HDL and the simulation is done in Modelsim 6.3b.
Platform: | Size: 1024 | Author: haziq36 | Hits:

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[VHDL-FPGA-Verilog] two_d_dct_serial

[Compress-Decompress algrithms] 601792346200732319490634862

[Graph program] DCT-vhdl

[2D Graphic] dct

[VHDL-FPGA-Verilog] DCT

[VHDL-FPGA-Verilog] Dct_verilog

[VHDL-FPGA-Verilog] DCT_1D

[Multimedia program] dct

[SCM] dct_source_code

[OpenGL program] DCT

[Graph program] dct1234

[Special Effects] butterfly-verilog

[Compress-Decompress algrithms] verilog_dct_serial

[VHDL-FPGA-Verilog] main_dct

[VHDL-FPGA-Verilog] yiweiDCTbianhuan

[Compress-Decompress algrithms] DCTPROGRAM.ZIP

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] dct_verilog

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] dct_parallel.tar

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