Search - dct fpga

[Other resource] DCT

Description: altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim 验证，文件中包含TESTBENCH ，直接可用
Platform: | Size: 15401328 | Author: alison | Hits:

[VHDL-FPGA-Verilog] two_d_dct_serial

Description: altera公司提供的适用于包涵DSP内核的FPGA的二维DCT变换源码，语言是：verilog 性能不错，不过资源消耗有点大，可以用来学习多项式变换的DCT算法-ALTERA companies covered in the application of FPGA DSP core 2D DCT source language is : Verilog performance is good, but a bit large consumption of resources can be used to transform learning polynomial algorithm DCT
Platform: | Size: 24576 | Author: 猪猪 | Hits:

[Software Engineering] fpgaJPEGdcode

Description: 基于fpga的JPEG编解码器设计，采用流水线优化解决时间并行性问题，提高DCT/IDCT模块的运行速度。-based fpga JPEG codec design, the flow of time to solve optimization problems in parallel, enhance DCT/IDCT module of the operating speed.
Platform: | Size: 6895616 | Author: Janke | Hits:

[Graph program] quantizer

Description: 这个DCT的源代码Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA-The DCT of source code Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA
Platform: | Size: 51200 | Author: lilei | Hits:

[VHDL-FPGA-Verilog] dct

Description: 2维DCt源码，可以实现8乘8点数据的2维DCT变换 -2-D DCT-source, you can realize 8 x 8 data 2-D DCT transform
Platform: | Size: 5120 | Author: jz | Hits:

[VHDL-FPGA-Verilog] DCT

Description: altera fpga verilog 设计的基于查找表的DCT程序及zigzag扫描程序，已经过matlab 和modelsim 验证，文件中包含TESTBENCH ，直接可用-altera fpga verilog design table DCT-based search procedures and zigzag scanning procedures, and ModelSim matlab has been verified, the document contains TESTBENCH, directly available
Platform: | Size: 15400960 | Author: alison | Hits:

[VHDL-FPGA-Verilog] jpeg.tar

Description: This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
Platform: | Size: 3416064 | Author: Bill Guan | Hits:

[Other] JPEGimageCompressiontechniquesimplementationandopt

Description: 摘　要文章以空间监控系统为背景,深入研究了JPEG图像压缩标准的实现方法,并基于FPGA对其进行了实现和优化。文中给出了详细的实现方法和优化过程,测试表明达到了很好的效果。简单介绍了有损静态图像压缩当前有两种比较流行的标准JPEG和JPEG2000。说明了用JPEG方法压缩的原因。介绍JPEG基本原理：JPEG对灰度图像的压缩处理过程主要包括:图像分割,离散余弦变换(DCT),量化(Quantization),“Z”形排序(Zigzag Scan),差分脉冲编码调制(Differential Pulse Code Modulation,DPCM)对直流系数(DC),行程长度编码(Run-Length Encoding,RLE)对交流系数(AC),霍夫曼(Huffman)编码等。 JPEG标准的特点是离散余弦变换。比较详细介绍压缩系统的构成和实现。实现提及步骤， JPEG压缩模块设计和编码模块实现细节。 -Abstract Article in the space monitoring system for the background, in-depth study of the JPEG image compression standard implementation methods and carried out based on FPGA implementation and optimization. In this paper, a detailed method of implementation and optimization of the process, testing showed that to achieve good results. Easy introduction of harmful static image compression has two kinds of comparisons that the current popular standard JPEG and JPEG2000. Illustrated by the reasons for JPEG compression method. JPEG introduce the basic principles: JPEG compression of gray-scale image processing include: image segmentation, discrete cosine transform (DCT), quantization (Quantization), "Z"-shaped sort (Zigzag Scan), differential pulse code modulation (Differential Pulse Code Modulation, DPCM) on the DC coefficient (DC), Run Length Encoding (Run-Length Encoding, RLE) of the exchange coefficient (AC), Hoffman (Huffman) coding. JPEG standard is characterized by discrete
Platform: | Size: 523264 | Author: 压子 | Hits:

[VHDL-FPGA-Verilog] dct2

Description: 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
Platform: | Size: 418816 | Author: jyb | Hits:

[Compress-Decompress algrithms] DCT_2D

Description: 二维DCT，FPGA实现JPEG压缩中的二维DCT-dct
Platform: | Size: 3072 | Author: paladin | Hits:

[Picture Viewer] 81404621JPEG-DCT

Description: 基于FPGA的DCT实现源代码,已通过MODELSIM验证。-FPGA based source code of DCT
Platform: | Size: 1024 | Author: 宋建 | Hits:

[VHDL-FPGA-Verilog] d1_dct

Description: FPGA 描述DCT ，希望对大家有用。-the DCT arithetics using fpga
Platform: | Size: 1024 | Author: Denny | Hits:

[VC/MFC] FPGA

Description: 个人收集的FPGA图像压缩算法包，包括内容主要为图像压缩算法DWT 离散小波变换 DCT 离散余弦变换 SHIHT 多级树集合划分 EBCOT优化截取的嵌入式块编码等-Personal collection of image compression algorithm for FPGA package, including the contents of the main image compression algorithm for the discrete wavelet transform DWT discrete cosine transform DCT multi-level tree SHIHT set partitioning optimization interception EBCOT Embedded Block Coding, etc.
Platform: | Size: 6079488 | Author: sdf | Hits:

[VHDL-FPGA-Verilog] Chapter6-9

Description: 第六章到第九章的代码本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相应的Testbench，所举实例具有很强的实用性和代表性，每个实例均给出了介绍、功能分析、程序代码和结果演示。-Chapter VI to Chapter IX of the code in this book through more than 100 module instance, explain in detail the Verilog HDL programming language, the book is divided into 13 chapters, covering basic concepts VerilogHDL languages, modeling, synchronous design, asynchronous design, functional verification, etc. Examples include a variety of adder/counter, multiplier/divider, encoders/decoders, state machines, SPIMaster Controller, I2C Master controller, CAN ProtocolController, Memory modules, JPEG image compression module, encryption module, ATA controller, 8-bit RISC-CPU, etc. and the various instances of the corresponding module Testbench, The examples are highly practical and representation, each instance of it all gives the introduction, functional analysis, program code and results presentation.
Platform: | Size: 6281216 | Author: xiao | Hits:

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[Other resource] DCT

[VHDL-FPGA-Verilog] two_d_dct_serial

[Software Engineering] fpgaJPEGdcode

[Graph program] quantizer

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] DCT

[VHDL-FPGA-Verilog] jpeg.tar

[Other] JPEGimageCompressiontechniquesimplementationandopt

[VHDL-FPGA-Verilog] dct2

[Compress-Decompress algrithms] DCT_2D

[Picture Viewer] 81404621JPEG-DCT

[VHDL-FPGA-Verilog] d1_dct

[VC/MFC] FPGA

[VHDL-FPGA-Verilog] Chapter6-9

[Embeded-SCM Develop] dct

[VHDL-FPGA-Verilog] ch3_dct

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] dct_verilog

[VHDL-FPGA-Verilog] dct

[VHDL-FPGA-Verilog] DCT

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