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[Other resourcedata_convert

Description: 十进制小数转化二进制小数(补码形式输出),对RAM或ROM设置初值极其方便-decimal metric system conversion binary decimal (Complement forms output), the RAM or ROM set initial extremely convenient
Platform: | Size: 1450 | Author: 华少洪 | Hits:

[Algorithmdata_convert

Description: 十进制小数转化二进制小数(补码形式输出),对RAM或ROM设置初值极其方便-decimal metric system conversion binary decimal (Complement forms output), the RAM or ROM set initial extremely convenient
Platform: | Size: 1024 | Author: 华少洪 | Hits:

[VHDL-FPGA-Verilogdata_convert

Description: 二进制码变换设计,完整的设计工程文件在data_convert文件夹下-Binary code conversion design, complete design engineering files in data_convert file folder
Platform: | Size: 1952768 | Author: xiebaiyuan | Hits:

[VHDL-FPGA-Verilogcounter

Description: 四位计数器设计,完整的设计工程文件在counter文件夹下-Binary code conversion design, complete design engineering files in data_convert file folder...
Platform: | Size: 1138688 | Author: xiebaiyuan | Hits:

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