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Description: 附件为LTE里CRC校验的MATLAB源程序。-The CRC checkout of LTE.
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Size: 1024 |
Author: 大侠 |
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Description: Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data
communication systems and other serial data transmission systems. CRC is based on
polynomial manipulations using modulo arithmetic. Some of the common Cyclic Redundancy
Check standards are CRC-8, CRC-12, CRC-16, CRC-32, and CRC-CCIT. This application note
discusses the implementation of an IEEE 802.3 CRC in a Virtex™ device. The reference
design provided with this application note provides Verilog point solutions for CRC-8, CRC-12,
CRC-16, and CRC-32. The Perl script (crcgen.pl) used to generate this code is also
included. The script generates Verilog source for CRC circuitry of any width (8, 12, 16, 32), any
polynomial, and any data input width.-Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication systems and other serial data transmission systems. CRC is based on polynomial manipulations using modulo arithmetic. Some of the common Cyclic Redundancy Check standards are CRC-8, CRC-12, CRC-16, CRC-32, and CRC-CCIT. This application note discusses the implementation of an IEEE 802.3 CRC in a Virtex ™ device. The reference design provided with this application note provides Verilog point solutions for CRC-8 , CRC-12, CRC-16, and CRC-32. The Perl script (crcgen.pl) used to generate this code is also included. The script generates Verilog source for CRC circuitry of any width (8, 12, 16, 32 ), any polynomial, and any data input width.
Platform: |
Size: 90112 |
Author: 尤恺元 |
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Description: CRC 8 CRC 16 CHECK PROGRAM .
Platform: |
Size: 105472 |
Author: didi |
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Description: 包括下面文档：
readme.txt : This file
crc8_8.v : CRC-8, 8-bit data input.
crc12_4.v : CRC-12, 4-bit data input.
crc16_8.v : CRC-16, 8-bit data input.
crc_ccit_8.v : CRC-CCIT, 8-bit data input.
crc32_8.v : CRC-32, 8-bit data input.
crcgen.pl : Perl script used to generate Verilog Source for CRC
caluculation.(Contains the following files
readme.txt : This file
crc8_8.v : CRC-8, 8-bit data input.
crc12_4.v : CRC-12, 4-bit data input.
crc16_8.v : CRC-16, 8-bit data input.
crc_ccit_8.v : CRC-CCIT, 8-bit data input.
crc32_8.v : CRC-32, 8-bit data input.
crcgen.pl : Perl script used to generate Verilog Source for CRC
caluculation.)
Platform: |
Size: 10240 |
Author: chris_lj
|
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Description: 在串口通信程序中，通信数据需要进行CRC校验，本程序为CRC 校验计算程序源码(the source code for crc verify.)
Platform: |
Size: 42385408 |
Author: @红牛 |
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