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[3G develop] costas_carrier_recover

Description: 基于硬件定点的完整的costas载波恢复环设计，FPGA设计可以用之参考。包括输入QPSK信号，16倍符号率采样，初始频差2.4KHz，以及低通滤波器的设计等待。最重要的是有本人的注释，易于上手。-Hardware-based fixed-point of complete costas carrier recovery loop design, FPGA reference design can be used. Including input QPSK signal, 16 times the symbol rate sampling, the initial frequency difference 2.4KHz, and the design of low-pass filter to wait. The most important thing is to have my notes, easy to fly.
Platform: | Size: 2048 | Author: luoshuwen | Hits:

[Software Engineering] Digital_Costas_loop_in_FPGA_Design_and_Implementat

Description: 全数字Costas环在FPGA上的设计与实现-Digital Costas loop in FPGA, Design and Implementation
Platform: | Size: 273408 | Author: 王新雨 | Hits:

[VHDL-FPGA-Verilog] Costas

Description: 介 绍 了 某 直 接 序 列 扩 频 、QPSK 调 制 系 统 接 收 通 道 中 四 相 Costas 载 波 跟 踪 环 的 原 理 及 其 基 于 DSP+FPGA 的 实 现-Introduced a direct-sequence spread spectrum, QPSK modulation system, receive path Costas carrier tracking loop four-phase principle and its implementation based on DSP+ FPGA
Platform: | Size: 562176 | Author: fy | Hits:

[Software Engineering] Costas-matlab

Description: 针对扩频系统的载波同步, 研究了数字Costas 环的设计和实现方法。介绍了数字Costas 环的结构、实现 载波同步的基本方法。以二阶环为例, 分析了数字锁相环的环路滤波器的参数设计方法, 为数字Costas 环的设计提 供了参考。提出了在高速信号处理板( 以FPGA 和DSP 为基础) 中数字Costas 环的实现方案, 经工程验证, 能够实现 载波同步, 解调出所需信号。-Design and Implementation of Digital Costas-loop
Platform: | Size: 204800 | Author: ningxiaomeng | Hits:

[Documents] COSTAS环载波同步

Description: how to come ture a costas loop in FPGA with verilog,it is very useful on project
Platform: | Size: 1695744 | Author: yang030150 | Hits:

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