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[Other resourcejcdl13

Description: 这是一本电子书,是关于CMOS VLSI设计原理和系统展望的,希望对您有所帮助!-This is an electronic book is on CMOS VLSI design principles and systems prospects, and I hope to have your help!
Platform: | Size: 7631909 | Author: 张奇 | Hits:

[Other resourceCsiapp

Description: for wince freescale i.mx21 cmos sensor 视频采集程序
Platform: | Size: 152287 | Author: 陈艳 | Hits:

[Other0000

Description: 8051 串行接口是一个可编程的全双工串行通讯接口。它可用作异步通讯方式(UART),与串行传送信息的外 部设备相连接,或用于通过标准异步通讯协议进行全双工的8051 多机系统也可以通过同步方式,使用TTL 或CMOS 移位寄存器来扩充I/O 口。
Platform: | Size: 189025 | Author: 张力伟 | Hits:

[Otherrs232

Description: 8051 串行接口是一个可编程的全双工串行通讯接口。它可用作异步通讯方式(UART),与串行传送信息的外 部设备相连接,或用于通过标准异步通讯协议进行全双工的8051 多机系统也可以通过同步方式,使用TTL 或CMOS 移位寄存器来扩充I/O 口。
Platform: | Size: 266633 | Author: 张力伟 | Hits:

[Other resourcesolution1324

Description: SX-CPLD/FPGA 数字逻辑电路设计实验仪 SX-CPLD/FPGA 数字逻辑电路设计实验仪 产品介绍 1.利用CPLD/FPGA 提供的软硬件开发环境学习最新逻辑IC 设计,以取代TTL/CMOS 复杂的硬件设计。 2.可使用电路绘图法、ABEL 语言、波形图和数字硬件描述语言法(VHDL/AHDL)来开发电路。 3.CPLD/ FPGA 提供引脚可任意设定,故作测试实验时不需要做硬件连接,可节省大量连线焊接时间,快速学习软硬件的运用。 4.CPLD/ FPGA 每一I/O Pin 皆有逻辑状态监视器,以便迅速了解每一引脚状态。 5.清楚标示每一管脚的脚位,易于观察和测量。 6.使用并口在开发系统下直接下载。 7.可在线将CPLD/ FPGA 程序到FLASH ROM,实验仪可独立运行,适合大学生EDA 电子竞赛。 8.可做8051 和CPLD/ FPGA 的组合电路实验。 9.适用于WINDOWS95/98/NT/2000/XP 操作系统。 10.数万门的现场可编程芯片让设计所思即所得。
Platform: | Size: 171215 | Author: vobno | Hits:

[BooksVLSI中文版_上.zip

Description: 目 錄 1 目 錄 Unix基本指令 第一章 zzzzzzzzzzzz 1.1 本章教學大綱...................................................1-2 1.2 Unix的歷史......................................................1-2 1.3 Unix基本指令簡介..........................................1-5 1.4 編輯器vi.........................................................1-45 1.5 Unix的基本檔案系統.....................................1-51 1.6 相關網站.........................................................1-60 1.7 課後習題相關網站.........................................1-61 CMOS VLSI設計概念與Design Flow 第二章 zzzzzzzzzzzz 2.1 本章教學大綱...................................................2-2 2.2 IC的各種設計方法..........................................2-2 2.3 MOS電晶體....................................................2-10 2.4 CMOS的技術.................................................2-16 2.5 Bottom Up與Top Down設計........................2-25 2.6 Full Custom IC的設計流程............................2-29 2.7 Design Frame work II之檔案結構..................2-33 2.8 CAD/CAE軟體的資料格式標準....................2-40 2.9 國科會晶片實現中心 ( CIC )........................2-42 2.10 作業.................................................................2-44 2 目 錄 第 如何進入Cadence 三章 zzzzzzzzzzzz 3.1 如何進入Cadence.............................................3-2 3.2 如何將Cadence 4.3.X的Lib轉成OPUS-97A 4.4版的Lib......................................................3-4 3.3 建立新的Library............................................3-12 3.4 建立新的cellview...........................................3-17 Schematic 第四章 zzzzzzzzzzzz 4.1 Schematic 指令介紹.......................................4-2 4.2 Schematic繪圖視窗選項介紹..........................4-3 4.3 實作範例:建立一Buffer的Schematic View4-27 4.4 將Schematic View轉出網路檔 (netlist) 的CDL out...................................................................4-30 Symbol 第五章 zzzzzzzzzzzz 5.1 Symbol View快速選擇介紹.............................5-2 5.2 Symbol繪圖視窗選擇項介紹...........................5-4 5.3 實作範例:建立一Buffer的Symbol View...5-22 Layout 第六章 zzzzzzzzzzzz 6.1 Layout View......................................................6-2 6.2 Layer Selection Window (LSW) 視窗..............6-3 6.3 Layout快速選項列介紹...................................6-3 6.4 Layout View繪圖視窗選擇項介紹..................6-6 6.5 實作範例:建立一Buffer的Layout View....6-37 目 錄 3 第 Dracula 七章 zzzzzzzzzzzz 7.1 Dracula介紹.....................................................7-2 7.2 DRC(Design Rule Checking).............................7-2 7.3 DRC錯誤範例說明........................................7-15 7.4 DRC Error Message.........................................7-24 7.5 ERC錯誤範例說明.........................................7-27 7.6 LVS(Layout vs. Schematic Check)..................7-32 7.7 LVS錯誤範例說明.........................................7-49 7.8 LVS的錯誤型態.............................................7-62 7.9 LPE(Layout Parameter Extraction)..................7-78 I/O Circuit及Package 第八章 zzzzzzzzzzzz 8.1 I/O Circuit概述.................................................8-2 8.2 基本分類...........................................................8-4 8.3 CIC之I/O PAD................................................8-9 8.4 I/O PAD的規劃..............................................8-28 8.5 範 例.............................................................8-34 8.6 包裝 (Package)...............................................8-36 SPICE Simulation 第九章 zzzzzzzzzzzz 9.1 本章教學大綱...................................................9-2 9.2 SPICE Simulation的基本概念..........................9-2 9.3 SPICE的語法...................................................9-5 9.4 用HSPICE來模擬............................................9-8 9.5 用PSPICE來模擬..........................................9-53 9.6 用IsSPICE來模擬..........................................9-58 9.7 用SBTSPICE來模擬.....................................9-68 4 目 錄 第 Design Guide 十章 zzzzzzzzzzzz 10.1 本章教學大綱.................................................10-2 10.2 Design for Reliability......................................10-2 10.3 Design for Testability....................................10-27 範例:JK FF 第十一章 zzzzzzzzzzzz 11.1 本章教學大綱.................................................11-2 11.2 JK正反器電路圖............................................11-2 11.3 建立所有的邏輯閘.........................................11-3 11.4 JK正反器之schematic及symbol view........11-10 11.5 用HSPICE來模擬JK正反器之狀態輸出...11-11 11.6 Debug............................................................11-16 11.7 PDRACULA的驗證.....................................11-29 教育性晶片製作申請程序及範例 附錄一 Design Rules實例 (Mead & Conway) 附錄二 XV使用說明 附錄三 將電路加入IOPAD的方法 附錄四 加入IOPAD的幾個動作 附錄五 積體電路電路布局保護法 附錄六 參考資料
Platform: | Size: 9318659 | Author: g9676612@cycu.edu.tw | Hits:

[Windows CECsiapp

Description: for wince freescale i.mx21 cmos sensor 视频采集程序-for wince freescale i.mx21 cmos sensor video capture program
Platform: | Size: 151552 | Author: 陈艳 | Hits:

[DSP programOV9121

Description: CMOS 9121 的设置程序,通过IIC设置,教你如何使用SCCB总线控制COMS。-CMOS 9121
Platform: | Size: 47104 | Author: 曹铭 | Hits:

[Other0000

Description: 8051 串行接口是一个可编程的全双工串行通讯接口。它可用作异步通讯方式(UART),与串行传送信息的外 部设备相连接,或用于通过标准异步通讯协议进行全双工的8051 多机系统也可以通过同步方式,使用TTL 或CMOS 移位寄存器来扩充I/O 口。-8051 serial interface is a programmable full-duplex serial communication interface. It can be used as asynchronous communication (UART), serial transmission of information with external devices connected, or used through a standard full-duplex asynchronous communication protocol for the more than 8051 systems can also be synchronized using a TTL or CMOS shift register to expand the I/O port.
Platform: | Size: 188416 | Author: 张力伟 | Hits:

[OtherTTL_and_CMOS

Description: TTL和CMOS电平总结,对电路设计有很大帮助的,希望能给大家带来点什么-TTL and CMOS-level summary of the circuit design are very helpful, I hope everyone can bring something
Platform: | Size: 6144 | Author: tanhui | Hits:

[Driver DevelopCMOSRW

Description: CMOS数据的写程序,在WINDOWS平台下进行I/O端口的读写操作实例应用;实现CMOS数据的读取备份和写入操作,CMOS实时时钟的读取和显示功能;-CMOS data written procedures carried out under WINDOWS platform I/O port to read and write operation of examples of applications the realization of CMOS data backup of the read and write operation, CMOS real time clock read and display functions
Platform: | Size: 359424 | Author: 丁衍 | Hits:

[OS programCMos

Description: 吐血奉献,在Windows XP/2000下直接读写访问端口,并演示了保存恢复CMOS信息的功能,演示了破解CMOS/BIOS密码的一种算法。基于DirectPort.dll。 并详细分析CMOS数据信息。 -direct I/O access,read and write cmos data,can save to a file and restore from a file in Windows XP/2000.
Platform: | Size: 61440 | Author: 宋益波 | Hits:

[Technology ManagementTLC549

Description: TLC548和TLC549是以8位开关电容逐次逼近A/D转换器为基础而构造的CMOS A/D转换器。它们设 计成能通过3态数据输出和模拟输入与微处理器或外围设备串行接口。TLC548和TLC549仅用输入/输出时 钟(I/O CLOCK) 和芯片选择(CS) 输入作数据控制。TLC548的最高I/O CLOCK输入频率为2.048MHz, 而TLC549的I/O CLOCK输入频率最高可达1.1MHz。 有关与大多数通用微处理器接口的详细资料已由工厂 准备好,可供使用。-TLC548 and TLC549 are 8-bit switched capacitor successive approximation A/D converter and the basic structure for CMOS A/D converter. They are designed through the 3-state data output and analog input and a microprocessor or peripheral device serial interface. TLC548 and TLC549 only input/output clock (I/O CLOCK) and chip select (CS) input for data control. TLC548 maximum I/O CLOCK input frequency of 2.048MHz, and TLC549 the I/O CLOCK input frequency up to 1.1MHz. With the most common microprocessor interface details from the factory ready availability.
Platform: | Size: 711680 | Author: ysy593 | Hits:

[Special EffectsISP_Introduction

Description: CMOS image sensor 图像处理功能模块划分与功能介绍-CMOS image sensor image processing features and functions introduced into modules
Platform: | Size: 594944 | Author: 沧海一笑 | Hits:

[Embeded Linux2440_Camera

Description: 本程序是ADS1.2环境下的2440裸奔程序,实现CMOS摄像头驱动采集图像,希望对大家有用。-This program is under the 2440 ADS1.2 streaking procedures to achieve CMOS camera driver capture images, and I hope useful.
Platform: | Size: 179200 | Author: 郝教授 | Hits:

[Embeded Linuxlinux-v4l

Description: 三星为测试CMOS模块,有一个简单的cam2fb.c 演示.它演示了RGB格式的CMOS摄像头,但是代码风格太乱了,因此我把代码重写,写成几个函数来简化处理.-允许输入拉丁字符的拼音 Samsung for testing CMOS modules a simple cam2fb.c-demo. It demonstrates the RGB format CMOS camera, but the code style too messy, so I rewrite the code, written in several functions to simplify processing.
Platform: | Size: 14336 | Author: king | Hits:

[Industry researchElonics-E4000-Low-Power-CMOS-Multi-Band-Tuner-Dat

Description: Elonics E4000 (e4K) RF Tuner IC Comprehensive Manufacturer s Datasheet. Produced only for use by OEM s as Developer/Engineering Documentation I fixed that :) Exactly what the open-source dev s needed to improve the project (rtl2832-sdr) As found partnered with the RTL2832U in the famous USB DVB/TV Tuner based budget SDR project NO PASSWORD - GENUINE ARTICLE - I AM THE ORIGINAL LEAKER
Platform: | Size: 1202176 | Author: benryanau | Hits:

[Software Engineeringv_s_inveter

Description: i was doing project in matlab
Platform: | Size: 9216 | Author: vijaykumarOO9 | Hits:

[MultiLanguageDesign of a Low-Power CMOS LVDS I/O Interface Circuit

Description: Abstract: The paper presents the design and implementation of LVDS (low-voltage differential signaling) receiver circuit, fully compatible with LVDS standard. The proposed circuit is composed of the telescopic amplifier and the comparator with internal hysteresis. The receiver supports 3.5 Gbps data rate with 7.4 mA current at 1.8 V supply according to post-layout circuit simulations. The circuit has the power consumption of 13.1 MW. Comparing with the conventional circuit, the circuit is achieved to reduce the power consumption by 19.1% and the data rate by 14.3%. The validity and effectiveness of the proposed circuit are verified through the circuit simulation with Samsung 0.18 μm CMOS (complementary metal-oxide-semiconductor) standard technology under the 1.8 V supply voltage.
Platform: | Size: 615465 | Author: ggc_gcc | Hits:

[DocumentsCCDCMOS图像传感器基础与应用

Description: 该文档详细介绍了CMOS sensor的工作原理以及曝光方式。其中包含了米本和也的《CCDCMOS图像传感器基础与应用》,本人添加了书签。(This document details the working principle and exposure mode of CMOS sensor.It includes mibenheye's ccdcmos image sensor foundation and application, and I added bookmarks.)
Platform: | Size: 41650176 | Author: 剑封喉 | Hits:
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