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[Other resource] 一个8位CISC结构的精简CPU

Description: 一个8位CISC结构的精简CPU，2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
Platform: | Size: 94838 | Author: 陈旭 | Hits:

[TreeView] RISC_CISC

Description: CPU从指令集的特点上可以分为两类：CISC和RISC。我们所熟悉的 Intel 系列CPU就是 CISC 的 CPU 的典型代表。那么，RISC 又是什么呢？RISC是英文Reduced Instruction Set Computer的缩写，汉语意思为\"精简指令系统计算机\"。相对应的CISC就是\"复杂指令系统计算机\"的意思。　　随着大规模集成电路技术的发展，计算机的硬件成本不断下降，软件成本不断提高，使得指令系统增加了更多更复杂的指令，以提高操作系统的效率。另外，同一系列的新型机对其指令系统只能扩充而不能减去旧型机的任意一条，以达到程序兼容。这样一来，指令系统越来越复杂，有的计算机指令甚至达到数百条。人们就称这种计算机为CISC（Complex Instruction Set Computer）。如IBM公司的大、中型计算机，Intel公司的8086、80286、80386微处理器等。
Platform: | Size: 8074 | Author: grant | Hits:

[TCP/IP stack] cisc8bitCPU

Description: 一个用硬件描述语言编写的cisc类型8位总线长度cpu实例的源代码
Platform: | Size: 1091809 | Author: 李建刚 | Hits:

[Internet-Network] Dynamips_Help

Description: cisco网络路由器dynamips的模拟器帮助文件!cisc o网络路由器dynamips的模拟器帮助文件!cisco网络路由器dynamips的模拟器帮助文件!
Platform: | Size: 350461 | Author: hemudu1001 | Hits:

[VHDL-FPGA-Verilog] 一个8位CISC结构的精简CPU

Description: 一个8位CISC结构的精简CPU，2还提供了编译器-an eight streamline the structure of the CISC CPU, the two also provided compiler
Platform: | Size: 94208 | Author: 陈旭 | Hits:

[TreeView] RISC_CISC

Description: CPU从指令集的特点上可以分为两类：CISC和RISC。我们所熟悉的 Intel 系列CPU就是 CISC 的 CPU 的典型代表。那么，RISC 又是什么呢？RISC是英文Reduced Instruction Set Computer的缩写，汉语意思为"精简指令系统计算机"。相对应的CISC就是"复杂指令系统计算机"的意思。　　随着大规模集成电路技术的发展，计算机的硬件成本不断下降，软件成本不断提高，使得指令系统增加了更多更复杂的指令，以提高操作系统的效率。另外，同一系列的新型机对其指令系统只能扩充而不能减去旧型机的任意一条，以达到程序兼容。这样一来，指令系统越来越复杂，有的计算机指令甚至达到数百条。人们就称这种计算机为CISC（Complex Instruction Set Computer）。如IBM公司的大、中型计算机，Intel公司的8086、80286、80386微处理器等。 -err
Platform: | Size: 8192 | Author: grant | Hits:

[TCP/IP stack] cisc8bitCPU

Description: 一个用硬件描述语言编写的cisc类型8位总线长度cpu实例的源代码-A hardware description language using the CISC type 8-bit bus the length of the source code examples cpu
Platform: | Size: 1091584 | Author: 李建刚 | Hits:

[Internet-Network] Dynamips_Help

Description: cisco网络路由器dynamips的模拟器帮助文件!cisc o网络路由器dynamips的模拟器帮助文件!cisco网络路由器dynamips的模拟器帮助文件!-cisco network routers dynamips simulator help file! cisc o network routers dynamips simulator help file! cisco network routers dynamips simulator help file!
Platform: | Size: 350208 | Author: hemudu1001 | Hits:

[Windows Develop] lcd

Description: AVR单片机是Atmel公司1997年推出的RISC单片机。RISC（精简指令系统计算机）是相对于CISC（复杂指令系统计算机）而言的-Atmel Corporation AVR Singlechip was launched in 1997 single-chip RISC. RISC (Reduced Instruction Set Computer) is compared with the CISC (complex instruction set computer) in terms of
Platform: | Size: 2048 | Author: 胡春样 | Hits:

[ActiveX/DCOM/ATL] 1131722058bit_MCU

Description: Reduce Instruction Set Computer (RISC) is a new trend on computer design. The opposite and rather established trend is Complex Instruction Set Computer (CISC), which consist lots of instruction sets, addressing modes, instruction formats and a number of possible instructions length. The complexity of the instruction makes the design more complicated. While RISC tend to reduce the complexity of the instructions set and thus make the design process easier.-Reduce Instruction Set Computer (RISC) is anew trend on computer design. The opposite andrather established trend is Complex InstructionSet Computer (CISC), which consist lots ofinstruction sets, addressing modes, instructionformats and a number of possible instructions length.The complexity of the instruction makes the designmore complicated. While RISC tend to reduce thecomplexity of the instructions set and thus make thedesign process easier.
Platform: | Size: 80896 | Author: ppzzhhsky | Hits:

[VHDL-FPGA-Verilog] computer10

Description: 基于VHDL语言的设计8位CISC微处理器实例-VHDL design language based on 8-bit CISC microprocessor examples
Platform: | Size: 757760 | Author: steven | Hits:

[VHDL-FPGA-Verilog] GraduationProject

Description: 进行了一个8位CISC处理器的设计与实现，该微处理器含有计算机基本的功能模块，并对存储器进行了层次化设计。指令系统中的指令分为四大类共十六条，其中包括算术逻辑指令、I/O指令、访存、转移指令和停机指令。在处理器的实现过程中,首先给出了数据通路结构,然后采用VerilogHDL进行硬件电路描述,并对每一个模块进行功能仿真以验证设计的正确性。最后对整个处理器执行程序进行指令验证,并得到综合后的网表。-Conducted an 8-bit CISC processor design and implementation, the microprocessor contains the basic functions of a computer module, and a hierarchical memory design. Instructions in the instruction set is divided into four main categories of a total of 16, including the arithmetic logic instruction, I/O instructions, visit survive the transfer of command and shutdown command. In the processor to achieve the process, first of all, given the structure of the data path, and then the use of hardware circuits VerilogHDL description of each function of a simulation module to verify the correctness of the design. Finally, the entire processor command to verify the implementation of procedures, and comprehensive post-netlist.
Platform: | Size: 518144 | Author: 李东升 | Hits:

[Windows Develop] 0600310230

Description: 计算机组成原理课程设计，仿真实现cisc指令系统的设计。实现乘法运算。代码。-Principles of Computer Organization course design, simulation, implementation cisc instruction design. To achieve multiplication. Code.
Platform: | Size: 866304 | Author: 23432 | Hits:

[ARM-PowerPC-ColdFire-MIPS] shiyanMUL

Description: 设计一台嵌入式CISC模型计算机（采用定长CPU周期、联合控制方式），并运行能完成一定功能的机器语言程序进行验证，程序功能可从以下3类中任选一个： ●输入1到8之间的任意一个整数N，求1到N之间的所有数的平方和并输出显示，和为单字长。 -To design a model of embedded CISC computer (using fixed-length CPU cycles, joint control mode), and run to complete a certain function of the machine language program to verify, the program functions available from the following three categories to choose one: ● Input 1 to 8 any integer between 1 N, seeking between 1 and N the number of squares of all, and the output display, and for the words long.
Platform: | Size: 994304 | Author: 拉拉 | Hits:

[VHDL-FPGA-Verilog] ram_latest

Description: VHDL实现CISC模型微处理器设计（含有rom和ram）本程序实现的是输入10个数，输出最小负数-VHDL model to achieve CISC microprocessor design (with rom and ram) to achieve this procedure is the number of input 10 and output the smallest negative
Platform: | Size: 1807360 | Author: 叶才三 | Hits:

[VHDL-FPGA-Verilog] KID_ROM

Description: VHDL实现的只带rom的CISC模型微处理器设计实现的是输入10个数，输出最小负数-VHDL implementation of the model with only rom the CISC microprocessor designs Realize that the number of input 10 and output the smallest negative
Platform: | Size: 1884160 | Author: 叶才三 | Hits:

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[Other resource] 一个8位CISC结构的精简CPU

[TreeView] RISC_CISC

[TCP/IP stack] cisc8bitCPU

[Internet-Network] Dynamips_Help

[VHDL-FPGA-Verilog] 一个8位CISC结构的精简CPU

[TreeView] RISC_CISC

[TCP/IP stack] cisc8bitCPU

[Internet-Network] Dynamips_Help

[Windows Develop] lcd

[ActiveX/DCOM/ATL] 1131722058bit_MCU

[VHDL-FPGA-Verilog] computer10

[VHDL-FPGA-Verilog] GraduationProject

[Windows Develop] 0600310230

[ARM-PowerPC-ColdFire-MIPS] shiyanMUL

[VHDL-FPGA-Verilog] ram_latest

[VHDL-FPGA-Verilog] KID_ROM

[VHDL-FPGA-Verilog] cisc

[VHDL-FPGA-Verilog] CISC-Processor-MOdule-Verilog

[Game Program] CISC-Processor-MOdule-Verilog

[Books] 基于VHDL语言的设计8位CISC微处理器实例

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