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Description: 串并转换源代码．串 并转换源代码．
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Size: 48608 |
Author: 潘珠珠 |
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Description: 串并转换源代码．串 并转换源代码．-String and convert the source code. String and convert the source code.
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Size: 48128 |
Author: 潘珠珠 |
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Description: 自己编写的串并变换的fpga程序，使用verilog语言-I have written FPGA series and transform, the use of Verilog language
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Size: 1024 |
Author: deng |
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Description: 串并转换器的verilog源代码带testbench文件-String and converter verilog testbench file with the source code
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Size: 1024 |
Author: 王双 |
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Description: 用Verilog HDL语言实现并串、串并接口的转换-Using Verilog HDL and string, string, and interface conversion
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Size: 364544 |
Author: 武晓栋 |
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Description: 用MATLAB中的SIMULINK实现串并变换。-Implemented in MATLAB SIMULINK serial-to-parallel conversion.
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Size: 7168 |
Author: 薛程序 |
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Description: FPGA串口转并口示例，用于spi接口转换，便于数据处理-FPGA serial-to-parallel port example
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Size: 333824 |
Author: MR su |
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Description: FPGA里关于串并转化的一些思路和相关的代码，供大家分享。-Some thoughts on the FPGA serial conversion and related code, for everyone to share.
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Size: 125952 |
Author: niu |
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Description: 基于FPGA的通信，实现串并并串转换，简单容易理解，代码完整，希望对你们有帮助-FPGA-based communication, and achieve string and string conversion, simple and easy to understand, code integrity, and I hope you have help
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Size: 206848 |
Author: wxl |
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Description: 此程序利用vhdl硬件描述语言在quartus平台上成功编译实现了串并转换功能。(This program successfully compiled and implemented serial and parallel conversion functions on the quartus platform by using VHDL hardware description language.)
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Size: 351232 |
Author: 魅才林亚奇 |
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