Search - arbiter

[Other resource] Arbiter

Description: Arbiter.v verilog实现三路请求，使用循环策略的仲裁器含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit
Platform: | Size: 1956 | Author: 夏虫 | Hits:

[VHDL-FPGA-Verilog] Arbiter

Description: Arbiter.v verilog实现三路请求，使用循环策略的仲裁器含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit
Platform: | Size: 2048 | Author: 夏虫 | Hits:

[Other] ahb_system_generator.tar

Description: An AHB system is made of masters slaves and interconnections. A general approach to include all possible "muxed" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new "complex" node.
Platform: | Size: 269312 | Author: 木石 | Hits:

[VHDL-FPGA-Verilog] arbiter

Description: VHDL源代码共享,资源多多共享,论坛上多多讨论!-VHDL source code sharing, sharing of resources a lot, a lot of discussion forums!
Platform: | Size: 1024 | Author: wangzhe | Hits:

[VHDL-FPGA-Verilog] arbiter

Description: 一个用verilog编写的总线仲裁程序。多个设备共享总线，不同设备的优先级是变化的，保证每个设备都有公平的使用总线的机会。-Verilog prepared a bus with arbitration proceedings. Multiple devices share the bus, the priority of different devices is changing to ensure that each device will have a fair opportunity to use the bus.
Platform: | Size: 3072 | Author: bao rui | Hits:

[Other] ahb_interface

Description: AHB BUS, Master Slave Arbiter -- example-AHB BUS, Master Slave Arbiter
Platform: | Size: 540672 | Author: Bill Guan | Hits:

[VHDL-FPGA-Verilog] Arbiter

Description: Arbiter unit includes client and server units. Used for Arbitation of multipliers in Altera FPGA based project. The code supports several multipliers and several clients with different priorities.-Arbiter unit includes client and server units. Used for Arbitation of multipliers in Altera FPGA based project. The code supports several multipliers and several clients with different priorities.
Platform: | Size: 6144 | Author: d0238 | Hits:

[Other] PCI_BUS_ARBITER

Description: PCI仲裁器代码，用verilog硬件描述语言写的-PCI Arbiter code, written in verilog hardware description language
Platform: | Size: 2048 | Author: 小杨 | Hits:

[MPI] 09_alloc

Description: 一个自己用verilog写的路由仲裁器的程序，基于fpga。-Own use verilog to write a routing arbiter of the program, based on fpga.
Platform: | Size: 35840 | Author: DYP | Hits:

[VHDL-FPGA-Verilog] round_three_stage

Description: 3 stage round arbiter using verilog
Platform: | Size: 1024 | Author: mmurali | Hits:

[Other] 9-PCI-Arbiter

Description: 轮转算法的9-PCI仲裁器，非常适合于设备比较多的情况-9-PCI_Arbiter-Round_Robin
Platform: | Size: 3072 | Author: 陈晓飞 | Hits:

[VHDL-FPGA-Verilog] arbiter_priority

Description: A priority arbiter design which will help some people out there. hope this will be useful for verification engineers
Platform: | Size: 75776 | Author: jijo | Hits:

[VHDL-FPGA-Verilog] LIP1733CORE_system_vbus_arbiter

Description: Verilog V Bus arbiter module
Platform: | Size: 27648 | Author: jc | Hits:

[VHDL-FPGA-Verilog] round_robin_arbiter

Description: Round Robin Bus Arbiter for 5-node 8-bit bus
Platform: | Size: 4096 | Author: justin990 | Hits:

[Linux-Unix] Arbiter-example

Description: Verilog examples Arbiter, priority mux etc.
Platform: | Size: 51200 | Author: Devendra Rana | Hits:

[VHDL-FPGA-Verilog] Verilog-Round-Robin-Arbiter-Model.tar

Description: Verilog Round Robin Arbiter Model
Platform: | Size: 1024 | Author: pippo | Hits:

[VHDL-FPGA-Verilog] 3

Description: Round-robin arbiter的行为。状态机的输入为Reset、CYC0、CYC1和CYC2，输出为GNT0、GNT1和GNT2。任选以下任一方式描述此状态机：-Round-robin arbiter
Platform: | Size: 1024 | Author: peter | Hits:

[VHDL-FPGA-Verilog] AHB-Arbiter-Module

Description: AMBA2.0版本AHB总线仲裁器设计方面的技术支持，参考ARM公司AMBA技术手册。对AHB仲裁电路的接口、基本逻辑等方面进行介绍。-AMBA2.0、AHB Arbiter Module
Platform: | Size: 169984 | Author: 杨宗凯 | Hits:

[e-language] arbiter

Description: A four level, round-robin arbiter WITH VHDL CODE
Platform: | Size: 1024 | Author: amin | Hits:

[Linux-Unix] arbiter

Description: Memory arbiter functions. Allocates bandwidth through the arbiter and sets up arbiter breakpoints for linux.
Platform: | Size: 5120 | Author: yojetin | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Other resource] Arbiter

[VHDL-FPGA-Verilog] Arbiter

[Other] ahb_system_generator.tar

[VHDL-FPGA-Verilog] arbiter

[VHDL-FPGA-Verilog] arbiter

[Other] ahb_interface

[VHDL-FPGA-Verilog] Arbiter

[Other] PCI_BUS_ARBITER

[MPI] 09_alloc

[VHDL-FPGA-Verilog] round_three_stage

[Other] 9-PCI-Arbiter

[VHDL-FPGA-Verilog] arbiter_priority

[VHDL-FPGA-Verilog] LIP1733CORE_system_vbus_arbiter

[VHDL-FPGA-Verilog] round_robin_arbiter

[Linux-Unix] Arbiter-example

[VHDL-FPGA-Verilog] Verilog-Round-Robin-Arbiter-Model.tar

[VHDL-FPGA-Verilog] 3

[VHDL-FPGA-Verilog] AHB-Arbiter-Module

[e-language] arbiter

[Linux-Unix] arbiter

CodeBus www.codebus.net