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[Other resource] aFifo

Description: verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定
Platform: | Size: 1516 | Author: 于玮 | Hits:

[Other resource] afifo

Description: FIFO 经过多次修改及上板调试 可放心使用 本人也在学习之中
Platform: | Size: 2276 | Author: zhangfang | Hits:

[Other resource] afifo

Description: 异步fifo的verilog程序，含有测试平台
Platform: | Size: 2819 | Author: dq | Hits:

[Software Engineering] aFifo

Description: verylog语言编程，为异步flipflop的程序。具有数据传输功能，数据位数可以用户设定-verylog language programming for asynchronous Flipflop procedures. With a data transmission function, data can be user set the median
Platform: | Size: 1024 | Author: 于玮 | Hits:

[Other Embeded program] afifo

Description: FIFO 经过多次修改及上板调试 可放心使用 本人也在学习之中-FIFO after many changes and debugging can be assured the board, I also study the use of
Platform: | Size: 2048 | Author: zhangfang | Hits:

[VHDL-FPGA-Verilog] afifo

Description:
Platform: | Size: 2048 | Author: dq | Hits:

[VHDL-FPGA-Verilog] SF_table_interface

Description: switch fabric部分代码: fabric和table management 的数据交换. Mac address 从afifo输入, 查询的结果:output port number 存于pfifo中-switch fabric part of the code: fabric and table management data exchange. Mac address from afifo input, the results of inquiries: output port number stored in Medium pfifo
Platform: | Size: 2048 | Author: 无影 | Hits:

[VHDL-FPGA-Verilog] aFifo

Description: This an implementation of an Asynchronous FIFO written in Verilog 2001.-This is an implementation of an Asynchronous FIFO written in Verilog 2001.
Platform: | Size: 2048 | Author: balloo | Hits:

[Other] aFifo

Description: 異步FIFO試作,寫入與讀取資料的時脈不同,藉此程式來達成-Test for asynchronous FIFO, write and read information on a different clock to the program to achieve
Platform: | Size: 1024 | Author: 陳天 | Hits:

[VHDL-FPGA-Verilog] afifo

Description: verilog编写的异步FIFO代码，功能仿真时是正确的。-verilog code written in asynchronous FIFO, functional simulation is the right time.
Platform: | Size: 1024 | Author: 查乐 | Hits:

[VHDL-FPGA-Verilog] aFifo

Description: 很好用的异步FIFO设计代码，和大家共享一下，这是我在一个美国的网站上找到的-Asynchronous FIFO design with good code, and share how this is an American site I found on
Platform: | Size: 1024 | Author: Eagle | Hits:

[VHDL-FPGA-Verilog] aFifo

Description: it is a vhdl source code for FIFO
Platform: | Size: 2048 | Author: Hadi | Hits:

[VHDL-FPGA-Verilog] aFifo.vhd.txt

Description: Async. FIFO for rtl coding and simulation
Platform: | Size: 2048 | Author: akurnya | Hits:

[VHDL-FPGA-Verilog] aFIFO

Description: 异步fifo代码。包含GrayCounter计数的算法代码-Asynchronous fifo code， contains GrayCounter counting code
Platform: | Size: 2048 | Author: 王永 | Hits:

[VHDL-FPGA-Verilog] afifo

Description: verilog HDL fifo , verilog HDL fifo , -verilog HDL fifo ,verilog HDL fifo ,verilog HDL fifo ,verilog HDL fifo ,
Platform: | Size: 2048 | Author: shaohejiang | Hits:

[OS program] aFIFO

Description: 实现了一个异步fifo功能的verilog模块-An asynchronous fifo function verilog module
Platform: | Size: 2048 | Author: 董萱 | Hits:

[e-language] aFifo

Description: Function : Asynchronous FIFO VHDL CODE
Platform: | Size: 2048 | Author: amin | Hits:

[VHDL-FPGA-Verilog] aFifo

Description: 异步fifo用verilog语言实现的完整代码，适用于数字前端的设计-This implementation is based on the article Asynchronous FIFO
Platform: | Size: 1024 | Author: 张牡丹 | Hits:

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