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[VHDL-FPGA-Verilog] adder_32

Description: 超前进位加法器是通常数字设计所必备的，本程序为32位超前进位加法器-CLA is usually necessary for digital design, the procedure for 32-bit CLA
Platform: | Size: 1024 | Author: zhaohongliang | Hits:

[VHDL-FPGA-Verilog] add(FLP)

Description: 一个32位元的浮点数加法器，可将两IEEE 754格式内的值进行相加-A 32-bit floating-point adder can be both within the IEEE 754 format to add value
Platform: | Size: 10240 | Author: TTJ | Hits:

[VHDL-FPGA-Verilog] top_pnadd32

Description: 32位元浮点数加法器,用于以VHDL编写的32位元CPU-32 bits floating-point Add
Platform: | Size: 2048 | Author: 朋友 | Hits:

[Other] f

Description: This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.-This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.
Platform: | Size: 73728 | Author: k | Hits:

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