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[VHDL-FPGA-Verilog] ADC_16bit

Description: 用verilog硬件描述语言编写的16位数模转换器的源代码，可以综合-with verilog hardware description language of 16 Digital to Analog source code can be integrated
Platform: | Size: 1024 | Author: awp | Hits:

[VHDL-FPGA-Verilog] ADControl

Description: 用verilog实现，ADC控制，源代码，可进行仿真-Verilog with the realization of, ADC control, source code, can be simulated
Platform: | Size: 139264 | Author: 代鑫 | Hits:

[VHDL-FPGA-Verilog] AD0819

Description: 利用verilog语言实现对AD0819的模数转换控制，源代码工程文件-Verilog language used on the AD0819' s ADC control, source code project files
Platform: | Size: 98304 | Author: lifejoy | Hits:

[VHDL-FPGA-Verilog] 16bitADC

Description: verilog实现的16位模数转换器参考源代码-verilog to achieve 16-bit ADC reference source code
Platform: | Size: 1024 | Author: 龚俊杰 | Hits:

[VHDL-FPGA-Verilog] hsadc

Description: ADC ADS62P49 It is TI adc verilog source code for
Platform: | Size: 2127872 | Author: anil | Hits:

[VHDL-FPGA-Verilog] ADC-

Description: it is the document & source code in verilog of adc using sparten 3e fpga kit
Platform: | Size: 721920 | Author: kamlesh | Hits:

[VHDL-FPGA-Verilog] ADC_16bit

Description: 16位ADC的verilog源代码 16-bit Analogue-Digital Converter-16-bit ADC verilog source code 16-bit Analogue-Digital Converter
Platform: | Size: 2048 | Author: wangzhenliang | Hits:

[VHDL-FPGA-Verilog] Cont_THS1207

Description: FPGA控制THS1207多通道ADC的verilog源代码-FPGA control THS1207 multi-channel ADC' s verilog source code
Platform: | Size: 1728512 | Author: 朱健 | Hits:

[VHDL-FPGA-Verilog] axi_jesd204b

Description: ADI JESD204接口的ADC与Xilinx FPGA接口IP，包含Verilog和VHDL源代码，AXI总线接口，ADC串行控制接口-ADI IP for interfacing JESD204 ADC to Xilinx FPGA, include Verilog/VHDL source code, AXI interface and serial config interface
Platform: | Size: 77824 | Author: Eddie | Hits:

[VHDL-FPGA-Verilog] SPI_ADC

Description: spi串行输出ADC——AD7989的verilog源代码。(Spi serial output ADC - AD7989 Verilog source code.)
Platform: | Size: 1024 | Author: Zhongzi123 | Hits:

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