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[Other] zishiyinglvbodebiyesheji

Description: 论文针对数字通信系统中，由于码间串扰(ISI)和信道加性噪声的干扰，导致信号在接收端产生误码，设计了基于LMS算法的自适应均衡器(滤波器)，并通过硬件描述语言VHDL和现场可编程逻辑器件FPGA实现均衡器的硬件实现。是一篇标准的毕业论文,有需要的朋友可以拿来做参考-Thesis for digital communications systems, crosstalk due to inter-symbol (ISI) and additive noise channel interference, leading to signals generated in the receiver error, design algorithm based on LMS adaptive equalizer (filter), and through hardware description languages VHDL and Field Programmable Logic Device FPGA hardware equalizer realize realize. Is a standard thesis, there is a need to make friends can be used as reference
Platform: | Size: 2353152 | Author: YZ | Hits:

[VHDL-FPGA-Verilog] fir_lms

Description: 基于FPGA的自适应滤波器的实现。采用Verilog编程，2阶滤波器。-FPGA-based realization of the adaptive filter. Using Verilog programming, 2-order filter.
Platform: | Size: 12288 | Author: 田文军 | Hits:

[VHDL-FPGA-Verilog] AdaptiveLMSequalizer

Description: 通信中的用的LMS均衡算法VHDL实现，代码不长，很容易看懂-Communication with the LMS equalization algorithm to achieve VHDL code is not long, it is easy to understand
Platform: | Size: 3072 | Author: 王王 | Hits:

[VHDL-FPGA-Verilog] ADAPTIVEFILTER

Description: 采用vhdl代码描述自适应滤波器，具有很好的可参考性，和实用性-Vhdl code to describe the use of adaptive filter, can be found with a good nature and usefulness of
Platform: | Size: 742400 | Author: shao | Hits:

[VHDL-FPGA-Verilog] AnEfficientDouble-FilterHardwareArchitectureforH.2

Description: 在此提出了一種新穎的硬體結構 實時執行的自適應去塊效應 過濾過程中指定的H.264/AVC視頻編碼 標準。-In this paper,a novel hardware architecture for real-time implementation of the adaptive deblocking filtering process specified by the H.264/AVC video coding standard, is presented.The deblocking filter is a computationally and data intensive tool resulting in an increased execution time of both the encoding and decoding processes.
Platform: | Size: 799744 | Author: 張哲銘 | Hits:

[VHDL-FPGA-Verilog] 8Adaptive_filters

Description: adaptive filter basics and implementation in vhdl
Platform: | Size: 1699840 | Author: pehraj | Hits:

[VHDL-FPGA-Verilog] Adaptive-digital-filter

Description: 自适应数字滤波器中乘法器的硬件设计，用VHDL语言实现自适应数字滤波器。-Adaptive digital filter in multiplier hardware design, using VHDL language adaptive digital filter.
Platform: | Size: 188416 | Author: doujiang | Hits:

[VHDL-FPGA-Verilog] LMS-vhdl-coad-

Description: 基于quartus的LMS 自适应滤波器代码，适合初学者 -The LMS adaptive filter based on quartus code, suitable for beginners
Platform: | Size: 15360 | Author: jialiangquan | Hits:

[VHDL-FPGA-Verilog] vhdl_lms

Description: vhdl 语言实现的lms算法的自适应滤波器 两种实现方式 包括改进-VHDL language lms algorithm adaptive filter implemented in two ways including improved
Platform: | Size: 46080 | Author: zhanshen | Hits:

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