Description: 静态时序分析，是IC design后端设计中最基本的基础部分-static timing analysis, design of the IC backend design the most basic part Platform: |
Size: 674401 |
Author:stefshen |
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Description: 静态时序分析，是IC design后端设计中最基本的基础部分-static timing analysis, design of the IC backend design the most basic part Platform: |
Size: 673792 |
Author:stefshen |
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Description: FPGA硬件设计的时序分析详细教程，包括保持、建立时间概念、毛刺等分析-FPGA hardware design tutorials detailed timing analysis, including the establishment of the concept of time, such as analysis of burr Platform: |
Size: 673792 |
Author:JET |
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Description: 学习FPGA设计时需要考虑系统的静态时序是否满足要求-FPGA design study and the need to consider whether the system to meet the requirements of static timing Platform: |
Size: 1316864 |
Author:juan |
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Description: 静态时序分析（Static Timing Analysis简称STA）经由完整的分析方式判断IC是否能够在使用者的时序环境下正常工作，对确保IC质量之课题，提供一个不错的解决方案。然而，对于许多IC设计者而言，STA是个既熟悉却又陌生的名词。本文将力求以简单叙述及图例说明的方式，对STA的基础概念及其在IC设计流程中的应用做详尽的介绍。-Static timing analysis (Static Timing Analysis referred to as STA) through a complete analysis of ways to determine whether IC timing in the user' s normal work environment, to ensure the quality of the subject IC to provide a good solution. However, for many IC design engineers, STA is both familiar yet strange term. This paper will seek to a simple narrative, and legend in the manner described, the basic concept of the STA and its application in IC design process of doing a detailed introduction. Platform: |
Size: 726016 |
Author:王铭义 |
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