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[VHDL-FPGA-Verilog] PWM

Description: 自己写的一个pwm模块，verilog的，是用于无刷电机控制的。-Himself wrote a pwm module, verilog is used for brushless motor control.
Platform: | Size: 3072 | Author: 李凯 | Hits:

[VHDL-FPGA-Verilog] FPGAdezizhixingSPWMboChengXu

Description: 基于FPGA的自治型SPWM波形发生器的设计！正弦脉宽调制（SPWM）技术在以电压源逆变电路为核心的电力电子装置中有着广泛的应用，如何产生SPWM脉冲序列及其实现手段是PWM技术的关键。大家共同探讨哈！-FPGA based SPWM autonomy-based waveform generator design! Sinusoidal pulse width modulation (SPWM) technology in the voltage source inverter circuit as the core of the power electronic devices have a wide range of applications, how to generate SPWM pulse sequence and its implementation means PWM technology is the key. Kazakhstan investigate everyone!
Platform: | Size: 4096 | Author: 小喻 | Hits:

[VHDL-FPGA-Verilog] SPWM

Description: VHDL采用自然采样法写的SPWM，里面有正弦表，可以通过外接输入正弦波和三角波的频率。 -VHDL using written natural sampling SPWM, there are sine table, you can enter through the external sinusoidal and triangular wave frequency.
Platform: | Size: 7168 | Author: zyb | Hits:

[SCM] pwm

Description: pwm的占空比和死区时间可调的Verilog HDL程序设计和测试-duty cycle of pwm and adjustable dead time of the Verilog HDL design and testing procedures
Platform: | Size: 1024 | Author: chenhaoran | Hits:

[VHDL-FPGA-Verilog] SPWM

Description: 用cpld开发的关于生成spwm波的vhdl程序代码-Cpld developed by spwm waves on the generation of vhdl code
Platform: | Size: 353280 | Author: 高原 | Hits:

[Embeded-SCM Develop] weifenxianxing

Description: 微分先行pid，c语言程序，平时做实验用的...大家不用编了，希望对大家有用-Difference to pid, c programming language, usually used to experiment ... we do not have compiled, we want to be useful
Platform: | Size: 5623808 | Author: jun7 | Hits:

[SCM] SPWM

Description: FPGA上用verilog写的SPWM控制程序，完美运行！自由调试，毕设内容，十分宝贵-The SPWM control program by verilog FPGA perfect run! Free commissioning, Bi-based content, invaluable
Platform: | Size: 1555456 | Author: 罗克韦尔 | Hits:

[VHDL-FPGA-Verilog] SPWMdaima

Description: spwm算法的verilog实现 对照论文表示成功-spwm algorithm verilog achieve control papers for success
Platform: | Size: 14336 | Author: 刘备 | Hits:

[VHDL-FPGA-Verilog] SPWM

Description: ALTERA FPGA上采用Verilog语言实现查表法产生三电平SPWM-Produce three-level SPWM by look-up table
Platform: | Size: 4420608 | Author: Jim | Hits:

[Documents] 三角函数的Verilog HDL语言实现

Description: 以Actel FPGA作为控制核心，通过自然采样法比较1个三角载波和3个相位差为1 200的正弦波，利用Verilog HDL语言实现死区时间可调的SPWM全数字算法，并在Fushion StartKit开发板上实现SPWM全数字算法。(With Actel FPGA as the control core, between 1 and 3 triangular carrier phase difference of 1200 sine wave by natural sampling, realize the adjustable dead time using Verilog HDL language of the SPWM digital algorithm and digital SPWM algorithm is realized in Fushion StartKit development board.)
Platform: | Size: 148480 | Author: 所罗门 | Hits:

[Other] SPWM

Description: 利用verilog语言实现正弦脉宽调制，经过调试可行(Using Verilog language to realize sinusoidal pulse width modulation)
Platform: | Size: 1024 | Author: 落魄小书童 | Hits:

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