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[VHDL-FPGA-Verilogled_control

Description: 本实验箱采用的液晶显示屏内置的控制器为SED1520,点阵为122×32,需要两片SED1520组成,由E1,E2分别选通,以控制显示屏的左右两半屏。图形液晶显示模块有两种连接方式,一种为直接访问方式,一种为间接访问方式。本实验采用直接控制方式。 直接控制方式就是将液晶显示模块的接口作为存储器或I/O设备直接挂在计算机总线上。计算机通过地址译码器控制E1和E2的选通;读/写操作信号R/W有地址线A1 控制,命令/数据寄存器选择信号由地址线A0控制。 -The experimental box with built-in LCD controller for the SED1520, lattice is 122 × 32, needs two SED1520 formed by the E1, E2, respectively gating to control the display of about two and a half screen. Graphic LCD module has two connections, one for the direct access method, an indirect access. In this study the direct control mode. Direct control method is to interface LCD module as memory or I/O devices directly linked to the computer bus. Computer controlled by address decoder strobe E1 and E2 read/write signal R/W control the address lines A1, command/data register select control signal from the address line A0.
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