Search - RS232 UART

[SCM] 单片机通讯模块程序 SPI IIC UART one_wire rs485

Description: 单片机通讯模块程序 SPI IIC UART（RS232）one_wire RS485总线均有详细解释是本人精心调试项目时所用望对你有帮助
Platform: | Size: 65201 | Author: dflibai | Hits:

[VHDL-FPGA-Verilog] uart_core

Description: UART RS232 IPCORE for sopc builder -RS232 UART IPCORE for sopc builder
Platform: | Size: 111616 | Author: 张建 | Hits:

[Embeded Linux] rs232-c51

Description: uart,mcu,linux,embedded soc-uart, mcu, linux, embedded soc
Platform: | Size: 58368 | Author: hf7612 | Hits:

[SCM] uart

Description: RS232串口程序，波特率可自行设置，如9600，19200，接收和发送程序-RS232 serial procedures, its own baud rate settings, such as 9600,19200, receive and send program
Platform: | Size: 1024 | Author: nihuan | Hits:

[Other] Uart

Description: AT90S8535和计算机通过RS232接口的完整通信程序-AT90S8535 and computer through the RS232 interface of the integrity of the communication program
Platform: | Size: 1024 | Author: 朱起敏 | Hits:

Description: 8051 串行接口是一个可编程的全双工串行通讯接口。它可用作异步通讯方式（UART），与串行传送信息的外部设备相连接，或用于通过标准异步通讯协议进行全双工的8051 多机系统也可以通过同步方式，使用TTL 或CMOS 移位寄存器来扩充I/O 口。-8051 serial interface is a programmable full-duplex serial communication interface. It can be used as asynchronous communication (UART), serial transmission of information with external devices connected, or used through a standard full-duplex asynchronous communication protocol for the more than 8051 systems can also be synchronized using a TTL or CMOS shift register to expand the I/O port.
Platform: | Size: 266240 | Author: 张力伟 | Hits:

[VHDL-FPGA-Verilog] uart

Description: 用Verilog实现的串口异步通信，适用于RS232-Using Verilog realization of serial asynchronous communication, applied to RS232
Platform: | Size: 1126400 | Author: 王权 | Hits:

[VHDL-FPGA-Verilog] uart

Description: vhdl语言编写的实现uart协议的程序,用于rs232电气接口程序开发.支持比特率从2400-115200.-VHDL languages realize UART protocol procedures, electrical RS232 interface for program development. to support the bit rate from 2400-115200.
Platform: | Size: 5120 | Author: 陈想 | Hits:

[VHDL-FPGA-Verilog] UARTRS232

Description: 用UART来接收PC机的RS232串行接口数据。由于UART每次只接收8位数据，所以在接收了两个8位数据之后，才将其存入16位的SRAM内。-Using UART to receive PC-RS232 serial interface data. As the UART receive only 8-bit data, so to receive two 8-bit data after its deposit in 16 of the SRAM.
Platform: | Size: 1024 | Author: xuye | Hits:

[VHDL-FPGA-Verilog] RS232

Description: quatus II 环境下vhdl实现RS232功能-quatus II environment realize RS232 VHDL functional
Platform: | Size: 437248 | Author: 王艳华 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 用FPGA实现了RS232异步串行通信，所用语言是VHDL，另外本人还有Verilog的欢迎交流学习，根据RS232 异步串行通信来的帧格式，在FPGA发送模块中采用的每一帧格式为：1位开始位+8位数据位+1位奇校验位+1位停止位，波特率为2400。由设置的波特率可以算出分频系数，具体算法为分频系数X=CLK/(BOUND*2)。-Using FPGA to achieve the RS232 asynchronous serial communication, the language used is VHDL, In addition, I also welcome the exchange of learning Verilog, according to RS232 asynchronous serial communication to the frame format, in the FPGA module used to send each frame format : the beginning of a bit+ 8-bit data bit+ 1 bit odd parity bit+ 1 bit stop bit, baud rate for 2400. By setting the baud rate can be calculated at the frequency coefficient, the specific algorithm for the sub-frequency coefficient X = CLK/(BOUND* 2).
Platform: | Size: 1024 | Author: saibei007 | Hits:

[Com Port] uart(Verilog)

Description: RS232的verilog源代码,如果需要的可以-RS232 of Verilog source code, if necessary can be
Platform: | Size: 10240 | Author: 陈强 | Hits:

[Com Port] uart

Description: 基于MAXII的RS232串口通信程序.还有使用VB编写的上位机串口通信软件。-MAXII based on the RS232 serial communication program. There are prepared to use VB PC serial communication software.
Platform: | Size: 199680 | Author: 张勋 | Hits:

[Com Port] UART

Description: 内含有完整的UART代码，包括发送和接受，且有testbench，可以直接仿真调试-Contain complete UART code, including send and receive and there testbench, can directly Simulation debugging
Platform: | Size: 9216 | Author: 李佳 | Hits:

[Com Port] UART

Description: UART配置接收数据，用c编写，有注释，连接rs232-UART configured to receive data, with c prepared annotated connecting RS232
Platform: | Size: 4096 | Author: zhangyong | Hits:

[Other] RS232

Description: Builder uses to integrate a larger system module. Each component consists of a structured set of files within a directory. The files in a component directory serve the following The RS232 UART Core implements a method for communication of serial data. The core provides a simple register-mapped Avalon庐 interface. Master peripherals [such as a Nios庐 II processor] communicate with the core by reading and writing control and data registers.
Platform: | Size: 561152 | Author: salah | Hits:

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[SCM] 单片机通讯模块程序 SPI IIC UART one_wire rs485

[VHDL-FPGA-Verilog] uart_core

[Embeded Linux] rs232-c51

[SCM] uart

[Other] Uart

[Other] rs232

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UARTRS232

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] UART

[Com Port] uart(Verilog)

[Com Port] uart

[Com Port] UART

[Com Port] UART

[Other] RS232

[Com Port] 449_232_OK

[VHDL-FPGA-Verilog] uart

[Other Embeded program] Digital-Barometer-txrx-rs232-UART

[VHDL-FPGA-Verilog] uart

CodeBus www.codebus.net

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[SCM] 单片机 通讯 模块程序 SPI IIC UART one_wire rs485

[VHDL-FPGA-Verilog] uart_core

[Embeded Linux] rs232-c51

[SCM] uart

[Other] Uart

[Other] rs232

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UARTRS232

[VHDL-FPGA-Verilog] RS232

[VHDL-FPGA-Verilog] UART

[Com Port] uart(Verilog)

[Com Port] uart

[Com Port] UART

[Com Port] UART

[Other] RS232

[Com Port] 449_232_OK

[VHDL-FPGA-Verilog] uart

[Other Embeded program] Digital-Barometer-txrx-rs232-UART

[VHDL-FPGA-Verilog] uart

CodeBus www.codebus.net

[SCM] 单片机通讯模块程序 SPI IIC UART one_wire rs485