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[VHDL-FPGA-Verilog] usb_funct[1].tar

Description: usb2.0的IP核，可在QuartusII或MaxPlusII环境下实现编译和生成ip核-usb2.0 IP nuclear, QuartusII or the environment under MaxPlusII compile and generate nuclear ip
Platform: | Size: 181248 | Author: 刘洋 | Hits:

[Embeded-SCM Develop] FPGA

Description: 有关FPGA的一些资料以及个别源程序，编辑环境为quartus 主要有：电子设计竞赛优秀论文 ----相位测量仪 采用高速AD的存储示波器设计 基于FPGA的多种分频设计与实现 兼容ALTERA公司的USB Blaster下载线的原理图和PCB文件 FPGA与单片机的接口程序 FPGA的大量课件和实验源代码资料 FPGA七段译码器的设计 QuartusII学习资料-FPGA QuartusII
Platform: | Size: 51513344 | Author: 丁南 | Hits:

[VHDL-FPGA-Verilog] USB2.0

Description: usb2.0 fpga程序 用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
Platform: | Size: 3567616 | Author: PETER | Hits:

[VHDL-FPGA-Verilog] USBhpi

Description: USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0\FPGA代码(Quartus)-USB FX2LP TO TI5402 HPI PORT MODE BOOT V1.0 \ FPGA code (Quartus)
Platform: | Size: 1024 | Author: 闫冰冰 | Hits:

[VHDL-FPGA-Verilog] NIOS_USBDEVICE

Description: FPGA QUARTUS USB总线通讯模块程序，常用模块。-FPGA QUARTUS USB bus module ,written by vhdl tools,a useful module.
Platform: | Size: 3072 | Author: pigeoon | Hits:

[VHDL-FPGA-Verilog] NIOS_USBHOST

Description: FPGA QUARTUS USB设备通讯模块程序，常用模块。-FPGA QUARTUS USB devive module ,embeded device.
Platform: | Size: 28672 | Author: pigeoon | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

Description: 本代码为DE2开发板例程源码（EP2C35F672C6），项目基于quartus II 9.0（随板光盘为7.2版本以下，在9.0版以上编译会报错）。本项目实现一个USB画笔功能，通过FPGA控制USB口，USB口接上鼠标，通过XGA口外界显示设备，实现显示设备对鼠标移动轨迹的显示。-In this demonstration, we implement a Paintbrush application by using a USB mouse as the input device.This demonstration uses the device port of the Philips ISP1362 chip and the Nios II processor to implement a USB mouse movement detector. We also implemented a video frame buffer with a VGA controller to perform the real-time image storage and display.
Platform: | Size: 2547712 | Author: chenxin | Hits:

[VHDL-FPGA-Verilog] CH376

Description: 用VERILOG HDL语言写的usb程序。FPGA芯片用的是ALTERA公司的，编程所用的软件为quartus和nios，USB芯片为CH376.-VERILOG HDL language written with usb program. ALTERA FPGA chip using the company s software program used quartus and nios, USB chip CH376.
Platform: | Size: 6358016 | Author: 周燕 | Hits:

[VHDL-FPGA-Verilog] USB_save

Description: 这是基于FPGA的USB通讯程序。通过在quartus中建立SOPC，建立PIO口，并在NIOS中写驱动和寄存器等，实现USB通信。经检验，该程序通信正常。-This is FPGA-based USB communication program. By establishing the quartus in SOPC, establish PIO mouth and NIOS to write drivers and registers, realize USB communications. Upon examination, the program can communicate.
Platform: | Size: 18978816 | Author: 周燕 | Hits:

[VHDL-FPGA-Verilog] CCD_drive

Description: TCD1304 CCD 驱动 AD转 USB2.0传输(This code based on verilog language, worked on EP1C3T144 FPGA chip, developed on Quartus II 12.0 . The ccd's data transformed by USB2.0 after amplified and AD confromed.)
Platform: | Size: 520192 | Author: Vwin | Hits:

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