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[matlab1

Description: 如何利用Matlab创建Quartus波形仿真文件,很详细-How to use Matlab to create Quartus simulation waveform files, very detailed
Platform: | Size: 5120 | Author: ylt | Hits:

[OtherMATLAB_and_FPGA

Description: 附录 光盘说明 本书附赠的光盘包括各章节实例的设计工程与源码,所有工程在下列软件环境下运行通过: ? Windows XP SP2 ? MATLAB ? Altera Quartus II ? synplify8.4 ? modelsim_ae6.1 光盘目录与实例名称的对应关系如下: cht02文件夹中存放的是书中第2章中的例子,读者可以将一些简单例子的代码 拷贝到MATLAB命令窗口进行运行,也可以把一些复杂的例子做成一个单独 的*.m文件然后运行、调试(要将每行前的“>>”删除)。 cht04文件夹存放的是书中第4章的例子代码。每个例子都建立了一个单独的文件夹, 除了存放与例子相关的代码外,还对各个例子建立了Quartus II工程,编制了仿真测试向量,并对例子进行了编译、综合、布局布线和时序仿真。 cht05文件夹中存放的是一个完整的正弦波频率产生的例子,即书中5.4.1节中的代码, 读者可以应用这些代码建立自己的项目,按照书中介绍的方法,获得完整的项目设计经验。 注意事项: 光盘中的源代码为作者编写,并调试通过,有兴趣的读者可以在此基础上进行二次开发,但请不要用作商业用途。 -CD-ROM Appendix Description The book comes with a CD-ROM includes examples of various sections of the design engineering and source code, all works in the following software environment to run through: ? Windows XP SP2 ? MATLAB ? Altera Quartus II ? Synplify8.4 ? Modelsim_ae6.1 CD-ROM directories and examples of correspondence between the names is as follows: cht02 folders stored in the book are Chapter 2 of the examples, readers may be some simple code examples Copy to the MATLAB command window to run, you can put some examples of the complex into a single And the*. m files to run, debug (to each line before the ">>" delete). cht04 folders stored in the book are examples of Chapter 4 code. Examples of each set up a separate folder, In addition to the storage associated with the example code, but also examples of each set up a Quartus II project, the preparation of the simulation test vectors, and examples have been compiled, integrated, p
Platform: | Size: 6961152 | Author: 吕成林 | Hits:

[VHDL-FPGA-Verilogmatlab_quartus_ii_MIF

Description: matlab quartus ii MIF
Platform: | Size: 10240 | Author: wangzhaohui | Hits:

[VHDL-FPGA-Verilogquartus.ii.11.0-crack

Description: 这是最新版的quartus11.0的破解文件,怎么做我就不说了,里面说的很清楚,我已经尝试,保证能用!希望大家学习愉快! 另外此破解只做内部测试交流,切勿用于商业用途,否则后果自负,请勿广泛传播。-This is the latest version of the quartus11.0 the crack file, how do I do not say, which made it very clear, I have tried, guaranteed to last! Hope you happy to learn! In addition to this internal testing only crack exchanges, not for commercial purposes, or peril, do not spread.
Platform: | Size: 20480 | Author: 王飞 | Hits:

[File FormatQuartus-II--Handbook-Version-11.0

Description: Quartus II 技术手册,详细说明quartus使用时注意事项-Quartus II Handbook Version 11.0
Platform: | Size: 6365184 | Author: railway | Hits:

[Linux-UnixQII_11.0_SP1_Linux

Description: un crack pra quartus II 11.0 sp1
Platform: | Size: 1117184 | Author: cronoxbu | Hits:

[VHDL-FPGA-VerilogDesktop

Description: un crack pra quartus II 11.0 sp1
Platform: | Size: 2235392 | Author: cronoxbu | Hits:

[VHDL-FPGA-VerilogQsys_nios2

Description: 本教程使用最新的Quartus 11.0sp1+Nios 11.0sp1开发工具。在最新的Quartus II软件中,使用了全新的Qsys进行SOPC系统的构建。 较之以前版本使用SOPC Builder构建有了很大的不同。 本教程为Altera最新的官方Tutorial。 一步步教你使用Qsys构建Nios II系统,并使用Nios II SBT开发应用程序。-This tutorial uses the latest Quartus 11.0sp1+ Nios 11.0sp1 development tools. In the latest Quartus II software, the use of a new build Qsys the SOPC system. Than the previous version has been using the SOPC Builder to build a big difference. This tutorial Altera' s latest official Tutorial. Step by step to teach you to use Qsys build Nios II system, and use the Nios II SBT application development.
Platform: | Size: 2358272 | Author: | Hits:

[SCMq_sys

Description: PCIe ip核。使用Quartus II 11.0,在Altera开发板4cgx15上验证通过。-PCIe ip core. Using the Quartus II 11.0, in the Altera development board 4cgx15 verify through.
Platform: | Size: 3072 | Author: xianwy | Hits:

[VHDL-FPGA-VerilogQIIv11.0_all_dll.ZIP

Description: dll for quartus ii 11.0
Platform: | Size: 1819648 | Author: Sergey | Hits:

[VHDL-FPGA-Verilogeetop.cn_quartus_ii_11.0_sp1_patched_sys_cpt_dll.

Description: dll for quartus ii 11.0 windows
Platform: | Size: 973824 | Author: Sergey | Hits:

[VHDL-FPGA-Verilogled2

Description: nios ii 流水灯源程序,采用quartus ii 11.0,nios ii 11.0,qsys构建CPU,由本人亲自编写,并下载至电路板验证流水灯成功-nios ii water lights, quartus ii 11.0 nios ii 11.0 qsys build the CPU, I personally prepared and downloaded to the board verification of light water
Platform: | Size: 8006656 | Author: 王超 | Hits:

[Other Embeded programsopc_lcd_led

Description: 利用De0_nano建立的SOPC系统,其中包含有LCD,LED,DDS函数发生和ADC等源程序。工程编译环境为Quartus II 11.0,eclipse for sopc。-Established by De0_nano SOPC system, which includes LCD, LED, DDS functions occurrence and ADC and other source. Project build environment for the Quartus II 11.0, eclipse for sopc.
Platform: | Size: 32747520 | Author: 包文博 | Hits:

[OtherQuartus_II_11.0install

Description: Quartus II 11.0安装教程。很详细,适用于初学者。-Quartus II 11.0 installation tutorial. Very detailed, suitable for beginners.
Platform: | Size: 1011712 | Author: 李阳 | Hits:

[VHDL-FPGA-Verilogcounter10

Description: verilog编写的10进制计数器,并且功能仿真正确。软件为quartus II 11.0,和Modelsim-verilog prepared 10 binary counter, and functional simulation is correct. Software quartus II 11.0, and Modelsim
Platform: | Size: 128000 | Author: 任留阳 | Hits:

[OtherIIC_write_one_bite_read_random

Description: 本实验通过IIC协议完成对EEPROM的操控,进行单字节的写入和随机的读取。-Module Name : IIC通信实验 //Engineer : WHN //Target Versions : EP2C8Q208C8 //Create Date : Quartus II 11.0 //Revision : V1.0 //Description : 本实验通过IIC协议完成对EEPROM的操控,进行单字节的 // 的写入和随机的读取。下面是顶层连线的代码 //Finish Time : 2013年8月14日
Platform: | Size: 780288 | Author: 汪皓楠 | Hits:

[VHDL-FPGA-Verilogex1

Description: 设计一个循环灯控制器,该控制器控制红、绿、黄三个发光管循环发亮。要求红发光管亮2秒,绿发光管亮3秒,黄发光管亮1秒。(假设外部提供频率为1MHz的方波信号) 编程环境为Quartus II 11.0 仿真环境为 Modelsim 6.6d 通过仿真可以看出。系统复位后,红发光管亮2秒,绿发光管亮3秒,黄发光管亮1秒,三个发光管循环发亮。 -Design a loop lamp controller that controls the red, green and yellow three LED lights cycle. Requirements red LED light 2 seconds, the green LED light 3 seconds, yellow light-emitting tube light 1 second. (Assuming a frequency of 1MHz externally a square wave signal) Programming environment for Quartus II 11.0 Simulation environment for the Modelsim 6.6d The simulation can be seen. After a system reset, the red LED light 2 seconds, the green LED light 3 seconds, yellow light-emitting tube light 1 second, three LED lights cycle.
Platform: | Size: 438272 | Author: zhuang | Hits:

[Software EngineeringQuartus-II-11.0

Description: Crack for Quartus II v11 Confirmed that works
Platform: | Size: 19456 | Author: bink | Hits:

[VHDL-FPGA-VerilogQuartus-II-11.0.208-SP1-Altera-Complete-Design-Su

Description: Altera Quartus 12.1 Software Patch
Platform: | Size: 722944 | Author: Anwar | Hits:

[OtherQuartus-II-11.0-32bit64bitCRACK

Description: quartus 11 64bit 32bit CRACK
Platform: | Size: 1422336 | Author: 孙云 | Hits:
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