Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card Platform: |
Size: 4978192 |
Author:明華 |
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Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card Platform: |
Size: 4977664 |
Author:明華 |
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Description: The Spartan-3E Starter Kit board highlights the unique features of the Spartan-3E FPGA family and provides a convenient development board for embedded processing applications. The board highlights these features:
• Spartan-3E FPGA specific features • Parallel NOR Flash configuration • MultiBoot FPGA configuration from Parallel NOR Flash PROM • SPI serial Flash configuration
• Embedded development • MicroBlazeTM 32-bit embedded RISC processor • PicoBlazeTM 8-bit embedded controller • DDR memory interfaces Platform: |
Size: 5851136 |
Author:Akalu Lentiro |
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Description: flashrom is a utility for detecting, reading, writing, verifying and erasing
flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images
in-system using a supported mainboard, but it also supports flashing of network
cards (NICs), SATA controller cards, and other external devices which can
program flash chips.
It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40
chips, which use various protocols such as LPC, FWH, parallel flash, or SPI.
Do not use flashrom on laptops! The embedded controller (EC) present in many
laptops interacts badly with any flash attempts and can brick your laptop
permanently.
Platform: |
Size: 284672 |
Author:NUCLEAR-WAR |
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Description: 提出一种应用于 NAND Flash 控制器的并行 BCH 编/译码器，在译码阶段引入流水线操作和分组预取译码操作，提升 BCH 码的译
码效率。实验结果表明，在 NAND Flash 的 2 KB 页读取操作中，该编/译码器纠正 8 bit 的随机错误只需要 565 个周期的译码时间，是采用按页预取译码方式所需时间的 1/4。
-Anew architecture of parallel BCH encoder and decoder applied in NAND Flash Controller is proposed. In order to obviously increase the throughput of decoder, pipeline operation and prefetch decoding in group operation are applied in the design. It takes 565 cycles to correct 8 bit random error after NAND Flash’s 2 KB page read operation, which is a quarter of the time cost by prefetch & decode in page.
Platform: |
Size: 1088512 |
Author:misslu |
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Search - Parallel Flash controller