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[VHDL-FPGA-Verilog] ml506_lab_resources

Description: xilinx 开发板ML506 示例代码集合。-Xilinx ML506 development board sample code collection.
Platform: | Size: 4547584 | Author: blackmew | Hits:

[Other] ML506_photo

Description: XILINX ML506 开发板高清晰照片，用于学习virtex-5.-The photo of xilix ML506 board,there are high clear,using for learning VIETEX-5.
Platform: | Size: 3245056 | Author: luoda | Hits:

[VHDL-FPGA-Verilog] small_fifo

Description: 同步fifo设计，仿真已通过，用Verilog编写，代码短小，易懂-Synchronous fifo design, simulation has been adopted, written with Verilog, code short and easy to understand
Platform: | Size: 1024 | Author: xinghuo | Hits:

[SCM] ml50x_20080331_bw

Description: ml506 实验板的原理图，希望对想了解ml506的人有用-ml506 test board schematics, hope to people who want to learn a useful ml506
Platform: | Size: 621568 | Author: xinghuo | Hits:

[VHDL-FPGA-Verilog] user-guide

Description: xilinx用户指南for ML505/ML506/ML507-User Guide
Platform: | Size: 783360 | Author: portia | Hits:

[VHDL-FPGA-Verilog] LED

Description: LED跑马灯 代码为Verilog。已经在V5 ML506上验证过。 -LED Marquee code for Verilog. On the V5 ML506 has been verified.
Platform: | Size: 2048 | Author: liangyao | Hits:

[VHDL-FPGA-Verilog] rtl

Description: LCD1602 Verilog 代码实现。包括数据读写，地址读写，初始化。支持4位总线格式。注意:此程序已经在ML506板子上验证过。本人花了好几天调试，开发出来的。值得推荐。-Verilog coding for LCD1602 display
Platform: | Size: 20480 | Author: liangyao | Hits:

[VHDL-FPGA-Verilog] ML_506_3_lcd_1602

Description: lcd1602的四线控制的verilog源码，在ML506平台上已经通过验证-The lcd1602 four-line control of Verilog source code which has been verified on the ML506 platform.
Platform: | Size: 6217728 | Author: xuechao | Hits:

[Software Engineering] FPGA-configuration-on-Xilinx

Description: FPGA configuration of ML506 Board using USB
Platform: | Size: 237568 | Author: thomz | Hits:

[Other] ml506_bsb_std_ip

Description: this files ml506 source for xilinx
Platform: | Size: 21186560 | Author: seung joo/woo | Hits:

[Other Embeded program] ConvCodeXilinx

Description: This a convolutional encoder in xilinx virtex-5 ML506 board FPGA. This program use matlab for comunicating with FPGA. The convolutional encoder using rate 1/2, and 1/3.The register are 3,4,5,6 and 7.-This is a convolutional encoder in xilinx virtex-5 ML506 board FPGA. This program use matlab for comunicating with FPGA. The convolutional encoder using rate 1/2, and 1/3.The register are 3,4,5,6 and 7.
Platform: | Size: 3072 | Author: Rizky Pratama | Hits:

[Program doc] ml506_lab_resources

Description: Xilinx ML506开发板的详细资料，有原理图和管脚图-stuff of ML506 board of Xilinx
Platform: | Size: 4626432 | Author: snowman | Hits:

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