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[
VHDL-FPGA-Verilog
]
rafal2
Description:
VHDL project for FPGA SPartan 3 using IseWebpack 10.1. This is an implemetation of FSM for testing 7 segment with dot point 4 digit LED display.
Platform:
|
Size:
941056
|
Author:
nukom
|
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Search - LED 7 SEGMENT 4digit