Welcome![Sign In][Sign Up]
Location:
Search - FPGA testing

Search list

[SCMtestEEPROMFM25L256

Description: 用MSP430F149仿真SPI接口读写FM25系列铁电的测试程序。包括单字节和多字节读写。已通过测试。请大家放心使用。-with MSP430F149 simulation SPI serial interface to read and write 25 ferroelectric testing procedures. Including single-byte and multi-byte read and write. Have passed the tests. Please rest assured use.
Platform: | Size: 17408 | Author: 魏兴贤 | Hits:

[Embeded-SCM Developboard_diag

Description: 在fpga上关于nios开发版的测试文件,测试对象包括led,lcd,uart,内存,基本io等,对于检测硬件十分有用-they simply on the development of the nios version of the test document, including testing led, LCD, UART, memory, basic io, for the very useful hardware detection
Platform: | Size: 8192 | Author: wp | Hits:

[VHDL-FPGA-Verilogcolor_space_converter

Description: verlog 编程 色彩空间转换 有测试文档-verlog programming color space conversion is testing documents
Platform: | Size: 8192 | Author: 周信均 | Hits:

[VHDL-FPGA-Verilogfpga_spi

Description: 文件中包含有用fpga实现isp接口的源码,以及和处理器接口,测试时处理器是ARM7。-document contains useful fpga achieve isp Interface source, as well as the processor interface, testing is ARM7 processor.
Platform: | Size: 2164736 | Author: 张创贞 | Hits:

[VHDL-FPGA-Verilogpic16f84

Description: pic MCU的HDL语言代码,实现器件是Xilinx FPGA,经过验证和测试-pic MCU HDL code, is the realization of Xilinx FPGA devices. After testing and validation
Platform: | Size: 48128 | Author: 钟方 | Hits:

[DSP programSEED_D1

Description: 合众达的开发板自带测试程序,适合初学者参考。(基于DM642的)-America to the development board to bring their own testing procedures, for beginners reference. (Based on the DM642)
Platform: | Size: 324608 | Author: 赵钱孙 | Hits:

[MPIpci_core_verilog

Description: PCI-master的核,verilog语言,经测试,可完成芯片的综合及布线-PCI-master s nuclear, verilog language, by testing, to be completed by the integrated chip and wiring
Platform: | Size: 216064 | Author: 伊路发 | Hits:

[VHDL-FPGA-VerilogFPGA_two-way_IO

Description: FPGA Verilog,双向端口的研究,比较全,由ASSIGN和ALWAYS模块组成,测试可用-FPGA Verilog, bi-directional port studies comparing full-, and ALWAYS by ASSIGN modules, testing available
Platform: | Size: 115712 | Author: 鲍纯贝 | Hits:

[VHDL-FPGA-Verilogata.tar

Description: 使用verilog和VHDL两种硬件描述语言实现了一个ATA硬盘控制器,包括源代码、测试仿真文件和说明文档-The use of two types of Verilog and VHDL hardware description language to achieve an ATA hard drive controller, including source code, testing, simulation files and documentation
Platform: | Size: 835584 | Author: qinlei | Hits:

[VHDL-FPGA-Verilogpg_070731

Description: 基于fpga的屏幕测试程序,可以根据测试要求在上位机的控制下生成各种图形图像,并调整参数-FPGA-based screen test procedure, based on testing requirements in the host computer under the control of a variety of graphics generated images, and adjust the parameters
Platform: | Size: 6602752 | Author: xianchunwang | Hits:

[VHDL-FPGA-Verilogwumayi

Description: 研究了传统误码仪的工作原理与结构,并利用VHDL语言在FPGA芯片上模拟实现了绝大部分的传统误码仪的功能,如LCD显示驱动,串口通信驱动,误码测试,数据存储芯片驱动等功能.-Research on the traditional instrument of the working principle of error with the structure and language use of VHDL simulation in the FPGA chip realize most of the traditional instrument error function, such as the LCD display driver, serial port communication driver, error testing, data storage Chip-driven functions.
Platform: | Size: 4048896 | Author: 张杰 | Hits:

[VHDL-FPGA-VerilogEPM7128SLC84-10chengxushili

Description: CPLD程序,ALTERA公司的EPM7128SLC84-10,PLCC84封装,已经调试过的程序,包含仿真文件,波形文件,VHDL语言程序,电路图以及PCB板和系统原理图,非常有用,尤其是初学EDA和CPLD、FPGA器件的人-CPLD procedures, ALTERA Corporation EPM7128SLC84-10, PLCC84 package, has been testing the procedure, including the simulation files, wave files, VHDL language program, circuit boards and systems, as well as PCB schematics, very useful, especially the beginner EDA and the CPLD, FPGA devices were
Platform: | Size: 155648 | Author: xiaobo | Hits:

[ActiveX/DCOM/ATLL2Com

Description: c167上用的程序,可以实现对接收FPGA发来的数据和向FPGA发送数据的检验,希望对大家有用!-C167 on the procedures used can be achieved on FPGA sent to receive data and send data to the FPGA testing, in the hope that everyone useful!
Platform: | Size: 97280 | Author: 高超 | Hits:

[DSP programTEST

Description: 代码用于测试dsp2812的硬件功能,硬件和FPGA通讯,共同完成任务-Dsp2812 code for testing the hardware functions, hardware and FPGA communication, a common task
Platform: | Size: 659456 | Author: liangting | Hits:

[VHDL-FPGA-VerilogRs232sourcecode

Description: Working RS232 controller running at 9600 Hz. Consist of Transmitter and Receiver Module. Tested in FPGA Spartan 3 Included files for testing at FPGA - Scan4digit .vhd - to display at 7 sgement display - D4to7 .vhd - Convert HEX decimal to ASCII code. -Working RS232 controller running at 9600 Hz. Consist of Transmitter and Receiver Module. Tested in FPGA Spartan 3 Included files for testing at FPGA - Scan4digit .vhd- to display at 7 sgement display - D4to7 .vhd- Convert HEX decimal to ASCII code.
Platform: | Size: 5120 | Author: Ikki | Hits:

[Software EngineeringICCE2008_SKH

Description: Design of a protoype of an FPGA-based RFID reader supporting the ISO/IEC 18000-6C UHF RFID protocol. Designed by Suh et al. used mainly for testing anticollision algorithms
Platform: | Size: 1389568 | Author: phyllis | Hits:

[OtherJPEGimageCompressiontechniquesimplementationandopt

Description: 摘 要 文章以空间监控系统为背景,深入研究了JPEG图像压缩标准的实现方法,并基于FPGA对其进行了实现和优化。文中给出了详细的实现方法和优化过程,测试表明达到了很好的效果。 简单介绍了有损静态图像压缩当前有两种比较流行的标准JPEG和JPEG2000。说明了用JPEG方法压缩的原因。 介绍JPEG基本原理:JPEG对灰度图像的压缩处理过程主要包括:图像分割,离散余弦变换(DCT),量化(Quantization),“Z”形排序(Zigzag Scan),差分脉冲编码调制(Differential Pulse Code Modulation,DPCM)对直流系数(DC),行程长度编码(Run-Length Encoding,RLE)对交流系数(AC),霍夫曼(Huffman)编码等。 JPEG标准的特点是离散余弦变换。 比较详细介绍压缩系统的构成和实现。实现提及步骤, JPEG压缩模块设计和编码模块实现细节。 -Abstract Article in the space monitoring system for the background, in-depth study of the JPEG image compression standard implementation methods and carried out based on FPGA implementation and optimization. In this paper, a detailed method of implementation and optimization of the process, testing showed that to achieve good results. Easy introduction of harmful static image compression has two kinds of comparisons that the current popular standard JPEG and JPEG2000. Illustrated by the reasons for JPEG compression method. JPEG introduce the basic principles: JPEG compression of gray-scale image processing include: image segmentation, discrete cosine transform (DCT), quantization (Quantization), "Z"-shaped sort (Zigzag Scan), differential pulse code modulation (Differential Pulse Code Modulation, DPCM) on the DC coefficient (DC), Run Length Encoding (Run-Length Encoding, RLE) of the exchange coefficient (AC), Hoffman (Huffman) coding. JPEG standard is characterized by discrete
Platform: | Size: 523264 | Author: 压子 | Hits:

[VHDL-FPGA-Verilogjiyu-FPGA-dianziqin

Description: 1) 主芯片:Altera 的FLEX10K20TC144-4 STC89C58RD+。 2) 要求扩展键盘接口电路,可以实现电子琴的一般功能,进行乐曲的手动演奏,此外还应该具有存储功能,可以将演奏的乐曲进行存储并在人工控制下进行回放。 3) 完成系统方案设计。 4) 编制相应的VHDL程序并进行相应的仿真工作,完成系统的调试工作。 5) 编写51系统程序,完成初始化、系统控制等功能。 6) 利用51系统实现系统的在线配置。 7) 发挥部分 可以进行乐曲的自动演奏。 -1) Main chipset: Altera' s FLEX10K20TC144-4 STC89C58RD+. 2) require the expansion of the keyboard interface circuit can be achieved general organ function, to music performed manually, in addition should have a storage function, which will perform the music store and playback under manual control. 3) complete the system design. 4) the preparation of the corresponding procedures and the corresponding VHDL simulation work, the completion of system testing. 5) procedures for the preparation of 51 systems to complete the initialization, the system control functions. 6) the use of 51 on-line system configuration. 7) to play some music can be performed automatically.
Platform: | Size: 68608 | Author: 任大志 | Hits:

[VHDL-FPGA-Verilogfpgadsk

Description: FPGA的测试程序,包括蜂鸣器、显示、流水灯,第一次拿到板子一定要试哦-FPGA testing procedures, including buzzer, display, water lights, for the first time Oh, must try to get the board
Platform: | Size: 700416 | Author: toutoublue | Hits:

[Software EngineeringAltera-FPGA-Testing-v1

Description: This document describes functionality testing of the Altera Cyclone III FPGA Starter Kit Development Board. It also includes testing of associated daughterboards, i.e. the ADA ADC/DAC board and the HSMC to GPIO adapter board.
Platform: | Size: 1209344 | Author: mchi2ph2 | Hits:
« 12 3 4 5 6 7 8 »

CodeBus www.codebus.net