Search - FPGA encoder

[Other] mp3_decoder

Description: mp3的VHDL实现，包括HUFFMAN编码器，量化器，子带滤波器．可用来开发：ＦＰＧＡ，ＡＳＩＣ．-mp3 of VHDL, including HUFFMAN encoder, quantizer, subband filters. Can be used to develop : FPGA, ASIC.
Platform: | Size: 36864 | Author: 六六 | Hits:

[VHDL-FPGA-Verilog] video_from_opencore

Description: 全电视信号编码器，verilog的，看看有借鉴价值否？-video signal encoder, Verilog, to see whether the reference value?
Platform: | Size: 152576 | Author: 12 | Hits:

[VHDL-FPGA-Verilog] qep_data_bus

Description: 基于地址总线接口的四倍频编码器信号接口的 FPGA实现 Verilog HDL的-address bus interface based on the four frequency signal encoder interface FPGA Verilog HDL
Platform: | Size: 1187840 | Author: 孙卓君 | Hits:

[Other Embeded program] fpga_coder_module

Description: 本人编写的FPGA光电编码器输入模块,没有实验,但仿真基本实现,希望有参考价值.-FPGA optical encoder input module, there is no experimental, but simulation technology, hope to have reference value.
Platform: | Size: 1302528 | Author: 刘庆强 | Hits:

[Other] JPEG2000fpga

Description: JPEG2000分数位平面编码器的fpga电路实现-scores bitplane JPEG2000 encoder circuit of fpga
Platform: | Size: 417792 | Author: han | Hits:

[Windows Develop] MPEG1layer3encoder

Description: MPEG1 layer3 encoder C语言实现。-MPEG1 layer 3 encoder C language.
Platform: | Size: 39936 | Author: | Hits:

[Streaming Mpeg4] ddd

Description: DVB—S2中LDPC码编码器的FPGA设计与实现-DVB-S2 in the LDPC code encoder FPGA Design and Implementation
Platform: | Size: 244736 | Author: sss | Hits:

[VHDL-FPGA-Verilog] hamming.tar

Description: Verilog语言实现的Hamming(3,7)编码器，可用于FPGA实现-Verilog Language realize the Hamming (3,7) encoder, can be used to realize FPGA
Platform: | Size: 6144 | Author: 陈楚龙 | Hits:

[Streaming Mpeg4] H.264

Description: 本书在介绍数字视频和视频编码的基本原理基础上，论述了H264的特点、编码器原理、解码器原理以及编解码器的实现方案。-This book, introducing digital video and video encoding based on the basic principles, discusses the characteristics of H264, encoder principle, the principle of the decoder and codec realization of the program.
Platform: | Size: 11018240 | Author: 许菀纯 | Hits:

[Picture Viewer] ejpgl-dev-0.251

Description: 嵌入式JPEG Encoder源码，适于PC和FPGA平台，方便移植，该版本为1.20的改进（1.20解压缩后可能无法使用）-JPEG Encoder embedded source, suitable for PC and FPGA platform for transplantation, the improvement of version 1.20 (1.20 after decompression may not be able to use)
Platform: | Size: 163840 | Author: 马振强 | Hits:

[Compress-Decompress algrithms] rs_encoder

Description: 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。-A very good RS encoder for DVB Channel Coding using VHDL language, in the FPGA-validated.
Platform: | Size: 3072 | Author: 杨宇 | Hits:

[Multimedia program] H263

Description: 本文介绍了作者在视频压缩编码及其硬件实现方面的研究。作者研究了ITU-T H.263视频编码标准，并在该标准的基础上提出了基于FPGA硬件实现的视频编码器结构。作者对码流复合、码率控制等关键技术做了深入研究，在理论的基础上提出了码流复合、码率控制的硬件实现方案。-This article describes the author in the video compression coding and its hardware implementation research. The author studied the ITU-TH.263 video coding standards, and in the standards based on the FPGA hardware implementation of video encoder structure. Author of the code stream complex, key technologies, such as rate control to do an in-depth research, in theory is proposed based on the composite stream, the hardware implementation of rate control programs.
Platform: | Size: 2565120 | Author: liu | Hits:

[VHDL-FPGA-Verilog] 5050PWM_V54

Description: FPGA 实现基于ISA接口的3路编码器计数，和3路PWM/DA输出编码器计数包括倍频、鉴相 PWM实现12位分辨率-FPGA-based ISA interface 3 Road encoder counts, and 3-way PWM/DA output encoder counts, including frequency doubling, phase PWM realize 12-bit resolution
Platform: | Size: 1084416 | Author: 吴波 | Hits:

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[Other] mp3_decoder

[VHDL-FPGA-Verilog] video_from_opencore

[VHDL-FPGA-Verilog] qep_data_bus

[Other Embeded program] fpga_coder_module

[Other] JPEG2000fpga

[Windows Develop] MPEG1layer3encoder

[Streaming Mpeg4] ddd

[VHDL-FPGA-Verilog] hamming.tar

[Streaming Mpeg4] H.264

[Picture Viewer] ejpgl-dev-0.251

[Compress-Decompress algrithms] rs_encoder

[Multimedia program] H263

[VHDL-FPGA-Verilog] 5050PWM_V54

[Other] The_Implementation_of_Manchester_Encoder_and_Decod

[VHDL-FPGA-Verilog] fpga-jpeg

[Software Engineering] FPGA-basedincrementalphotoelectricencodercountcirc

[Special Effects] FPGA

[VHDL-FPGA-Verilog] FPGA-LDPC

[Linux-Unix] ENCODE_8B_10B

[VHDL-FPGA-Verilog] Desktop

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