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[VHDL-FPGA-Verilogsrc

Description: 一个SDH中最基本传输模块STM-1的帧头检测器,verilog编程实现-A basic SDH transmission module STM-1 Header detector, verilog Programming
Platform: | Size: 3072 | Author: fredyu | Hits:

[VHDL-FPGA-Verilogk21test

Description: 只需要FPGA两个通用管脚,就可以实现FPGA与PC机进行以太网通信!!如果你有ALTERA_DE1的开发板,可以直接下再看效果,用其他板子就要重新分配一下管脚,推荐使用电流输出。-Only two general-purpose FPGA pins, you can realize FPGA and Ethernet PC machine! ! If you have ALTERA_DE1 development board, you can look under the direct effect, with other board you will need to reconsider the distribution of pins, recommended the use of current output.
Platform: | Size: 880640 | Author: 245680 | Hits:

[Linux-UnixLinux_bc

Description: 对vga接口做了详细的介绍,并且有一 ·三段式Verilog的IDE程序,但只有DMA ·电子密码锁,基于fpga实现,密码正 ·IIR、FIR、FFT各模块程序设计例程, ·基于逻辑工具的以太网开发,基于逻 ·自己写的一个测温元件(ds18b20)的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example(McGr ·这是CAN总线控制器的IP核,源码是由 ·FPGA设计的SDRAM控制器,有仿真代码 ·xilinx fpga 下的IDE控制器原代码, ·用verilog写的,基于查表法实现的LO ·精通verilog HDL语言编- up:in STD_LOGIC down:in STD_LOGIC run_stop:in STD_LOGIC wai_t: in std_logic_vector(2 downto 0) lift:in std_logic_vector(2 downto 0) ladd: out std_logic_vector(1 downto 0) ) end control
Platform: | Size: 18683904 | Author: liuzhou | Hits:

[File FormatSDH

Description: FPGA的应用,数字交叉连接矩阵的应用,VERILOG的一些应用等-FPGA applications, the application of digital cross-connect matrix, VERILOG some of the applications
Platform: | Size: 707584 | Author: 辛晨 | Hits:

[Software EngineeringSDH_dxoc

Description: 该文档是基于FPGA技术的SDH交换芯片设计与实现,有需要的可以参考学习。-This document is based on FPGA technology, SDH switching chip design and implementation, where necessary, can refer to the study.
Platform: | Size: 253952 | Author: 何柳 | Hits:

[Othera

Description: 利用FPGA实现SDH开销中帧头A1A2的检测-FPGA implementation using SDH overhead in the frame header detection of A1A2
Platform: | Size: 2048 | Author: 璐璐 | Hits:

[Program docSTM-N-frame

Description: 介绍了SDH传输中的STM-N帧的定位和开销处理的一些关键信息,有助于FPGA编程实现开销处理和通道处理。-Describes the SDH transmission of STM-N frame and the positioning of some of the key information processing costs, help processing and FPGA programming overhead channel processing.
Platform: | Size: 135168 | Author: | Hits:

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