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[VHDL-FPGA-Veriloghamming_decoder

Description: 汉明编码和解码的VHDL程序,直接解压就可以了-Hamming encoding and decoding process of VHDL, can be directly extracted a
Platform: | Size: 1024 | Author: 李成军 | Hits:

[Other Embeded programECC_program

Description: ecc 算法实现和纠错 1。nand_trans_result函数是实现ecc的行校验 2。nand_calculate_ecc函数是实现ecc的列校验 3。nand_correct_data函数实现1bit纠错-ecc algorithm and error-correcting one. nand_trans_result function is to achieve parity 2 rows ecc. ecc realize nand_calculate_ecc function is checking out the 3. 1bit error correction function nand_correct_data realize
Platform: | Size: 1024 | Author: czhwin99 | Hits:

[Crack HackECDSA_Verilog

Description: 椭圆曲线加解密算法的verilog实现,帮助初学者有效理解ECC算法。-Elliptic curve encryption and decryption algorithm verilog implementation, to help beginners understand the ECC algorithm is effective.
Platform: | Size: 3072 | Author: 张勇奇 | Hits:

[Crack HackECC

Description: 我整理的ECC加密算法,源码和C实现的理论指导,有这个可以做出ECC加密算法-I am finishing ECC encryption algorithm, source and C to achieve the theoretical guidance, it can make ECC encryption algorithm
Platform: | Size: 831488 | Author: oliver | Hits:

[VHDL-FPGA-VerilogNAND_Flash_Controller

Description: FPGA实现的NandFlash控制器(带ECC)文档+源代码。-FPGA implementation NandFlash controller (with ECC) document+ source code.
Platform: | Size: 1587200 | Author: 李银 | Hits:

[VHDL-FPGA-VerilogECC_check

Description: 实现对三星nand Flash的存储信息的错误检测,实现一位纠错,两位检错-ECC check 1bit correct 2bit check Samsung nand Flash
Platform: | Size: 1506304 | Author: xidian | Hits:

[VHDL-FPGA-Verilogecc

Description: For implementing the Hamming coding in verilog or VHDL
Platform: | Size: 132096 | Author: test | Hits:

[VHDL-FPGA-VerilogNandFlash-FPGA-controller(ECC)

Description: 该压缩包包括NAND FLASH(美光)的FPGA控制器的原理及VHDL源码,非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
Platform: | Size: 1587200 | Author: 张明利 | Hits:

[VHDL-FPGA-Verilog-Elliptic

Description: We present elliptic curve cryptography (ECC) coprocessor, which is dual-field processor with projective coordinator. We have implemented architecture for scalar multiplication, which is key operation in elliptic curve cryptography. Our coprocessor can be adapted both prime field and binary field, also contains a control unit with 256 bit serial and parallel operations , which provide integrated highthroughput with low power consumptions. Our scalar multiplier architecture operation is perform base on clock rate and produce better performance in term of time and area compared to similar works. We used Verilog for programming and synthesized using Xilinx Vertex II Pro devices. Simulation was done with Modelsim XE 6.1e, VLSI simulation software from Mentor Graphics Corporation especially for Xilinx devices.
Platform: | Size: 116736 | Author: 陳曉慧 | Hits:

[Crack Hackrtl_wangjiangxing

Description: ecc椭圆算法RTL,verilog经过验证-ecc verilog
Platform: | Size: 15360 | Author: zhaop | Hits:

[Crack Hackecc_verilog code

Description: ELLIPTIC CURVE CRYPTOGRAPHY VERILOG CODE
Platform: | Size: 9635840 | Author: Maitrey | Hits:

[VHDL-FPGA-VerilogECC

Description: 基于汉明码的ECC纠错算法,可纠错1位,供参考(An ECC error correction algorithm based on hamming code can be used for reference)
Platform: | Size: 1024 | Author: 一粒尘埃 | Hits:

[VHDL-FPGA-Verilog2bit_ecc

Description: 基于BCH码的ECC纠错算法,可纠错2位错误码,供参考(Based on BCH code ECC error correction algorithm, two error codes can be corrected for reference.)
Platform: | Size: 24576 | Author: 一粒尘埃 | Hits:

[VHDL-FPGA-VerilogHamming-ECC-master

Description: HI THAT IS DOC AND CODE FOR HAMMING CODE
Platform: | Size: 30720 | Author: nano1 | Hits:

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