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[Other resourceDigitalClockVHDL

Description: 多功能电子时钟的VHDL源代码。使用MAX+PLUS II进行编译。该文档有详细的说明和程序注释。-VHDL source code. Use MAX PLUS II computer. The document is described in detail in the Notes and procedures.
Platform: | Size: 84617 | Author: wangyiran | Hits:

[VHDL-FPGA-VerilogDigitalClockVHDL

Description: 多功能电子时钟的VHDL源代码。使用MAX+PLUS II进行编译。该文档有详细的说明和程序注释。-VHDL source code. Use MAX PLUS II computer. The document is described in detail in the Notes and procedures.
Platform: | Size: 83968 | Author: wangyiran | Hits:

[VHDL-FPGA-Verilogdigitalclockvhdl

Description: EAD设计VHDL语言环境数字时钟数码管显示方案,包括时间设置、调整等。-VHDL language environment EAD design digital digital clock display, including time for setup, adjustment.
Platform: | Size: 8192 | Author: 王丽 | Hits:

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