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[VHDL-FPGA-Verilogkeyboad

Description: VHDL 的4*4键盘代码-VHDL 4* 4 keyboard code
Platform: | Size: 1024 | Author: 王攀 | Hits:

[VHDL-FPGA-Verilogmultiplier

Description: 8*8乘法器及其测试:采用booth编码的乘法器:1. ultipler_quick_add_4 即4位的并行全加器,在这里主要起了两个作用:第一个是在求部分积单元时,当编码为3x时用来输出部分积;另外一个是在将部分积加起来时,求3到6位时所用到。 2. ultiplier_quick_add_5 即5位的并行全加器,这里用来分别计算积的7到11位和12到16位。 3. ultiplier_unit_4 这个模块是用来实现部分积的,每一个模块实现一个部分积的4位,因此一个部分积需要4个这个模块来实现。总共需要12个这样的模块。 4.Multiplier_full_add 这是一位的全加器,在实现部分积相加的时候,通过全加器的阵列来实现的。
Platform: | Size: 9216 | Author: chenyi | Hits:

[CommunicationDQPSk

Description:
Platform: | Size: 988160 | Author: deng | Hits:

[Program docFPGA_4DQPSK

Description: 采用FPGA 实现π/ 4 DQPSK调制器-- 北 方 交 通 大 学 学 报-FPGA implementation using π/4 DQPSK modulator- Journal of Northern Jiaotong University
Platform: | Size: 108544 | Author: 陨星 | Hits:

[3G developsrc

Description: DQPSK modulation with XILINX FPGA. 2 level butterworth analog filter for I & Q D/A output. -DQPSK modulation with XILINX FPGA. 2 level butterworth analog filter for I & Q D/A output.
Platform: | Size: 60416 | Author: youker | Hits:

[VHDL-FPGA-Verilogdqpsk_demodulator_f_pa

Description: FSK QPSK DQPSK 等verilog 源码 及asic实现-FSK QPSK DQPSK and asic implementation such as verilog source
Platform: | Size: 63488 | Author: nie | Hits:

[VHDL-FPGA-VerilogStudy_on_Key_Technologies_of_n4-DQPSK_Modulation_a

Description: 本文首先研究可4一DQPsK调制解调系统中调制部分的基本原理和各个模块的设计方案,重点研究成形滤波器和直接数字频率合成器 (DireetoigitalFrequeneySynihesis,简称DDS),并针对各个关键模块算法进行matlab设计仿真,展示仿真结果。其次,研究调制解调系统解调部分的基本原理和各个模块的设计方案,重点研究差分解调,数字下变频和位同步算法,也针对其各个关键模块进行算法的Matlab设计仿真。然后用Matlab对整个系统进行理论仿真,得出结论。在此基础 上,采用超高速集成电路硬件描述语言(VeryHighspeedxntegatedeireuitHardware DescriptionLan即age,简称VHDL)在Altera公司 Quartusll7.0开发环境下设计并实现各个功能块,通过仿真来证明功能正确性。再次,用 Protel99SE进行印制电路板(Prinicircuitboard,简称PcB)设计,从原理图到封装,再到布局布线。焊接调试完毕后,将设计好的程序下载至FPGA主芯片。最后观察信号时域波形、星座图、眼图。本系统信源输入符号速率100kbPs,调制中频10MHz。测试结果验证系统的正确性,实现了从数字基带到中频的可4一DQPSK调制解调系统-This study is the first 4 1 DQPsK modem modulation system, part of the basic principles and design of each module, focusing on shaping filter and a direct digital frequency synthesizer (DireetoigitalFrequeneySynihesis, referred to as DDS), and to address all the key modules algorithm matlab design simulation to show simulation results. Second, the study of modulation and demodulation system demodulation part of the basic principles and design of each module, focusing on differential demodulation, digital down conversion and bit synchronization algorithm, but also for its various key module of the Matlab algorithm design and simulation. Then use the Matlab simulation of the entire system theory, reach a conclusion. On this basis, , Using ultra-high speed integrated circuit hardware description language (VeryHighspeedxntegatedeireuitHardware DescriptionLan that age, referred to as VHDL) in the Altera Corporation Quartusll7.0 development environment to design and implement the variou
Platform: | Size: 5457920 | Author: cai | Hits:

[assembly languageDQPSK

Description: 基于VHDL的串并转换设计 完美编译 希望可以帮到大家- String and transformation design based on VHDL Perfect compilation The hope can help you
Platform: | Size: 222208 | Author: dfsg | Hits:

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