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[Other resourcediv3

Description: VHDL实现50%占空比。并且是奇数分频。
Platform: | Size: 118256 | Author: skylinnan | Hits:

[Other resourcediv3

Description: 用VHDL硬件描述语言实现的良好运行的三分频电路
Platform: | Size: 1050 | Author: 赵杰 | Hits:

[VHDL-FPGA-Verilogdiv3

Description: VHDL实现50%占空比。并且是奇数分频。-VHDL to achieve 50 duty cycle. And is odd-numbered sub-frequency.
Platform: | Size: 117760 | Author: skylinnan | Hits:

[VHDL-FPGA-Verilogdiv3

Description: 用VHDL硬件描述语言实现的良好运行的三分频电路-Using VHDL hardware description language to achieve a good run of one-third frequency circuit
Platform: | Size: 1024 | Author: 赵杰 | Hits:

[ELanguagediv3

Description: flex code,compiler theory curriculum design, the C write PL / 0 compiler, a detailed documentation and code -flex code, compiler theory curriculum design, the C write PL/0 compiler, a detailed documentation and code
Platform: | Size: 39936 | Author: yn | Hits:

[VHDL-FPGA-VerilogDiv3

Description: 一个除3器的Verilog源码,用于视频解码器的熵解码部分。纯组合逻辑,大小和加法器差不多。-In addition to device a Verilog source code 3, the video decoder for entropy decoding part. Pure combinational logic, about the size and adder.
Platform: | Size: 106496 | Author: 闫煜 | Hits:

[VHDL-FPGA-Verilogdiv3

Description: 实现三分频功能,占空比为50 ,可以很好的用于解决课程设计问题!-This is used for divide the frequency,and the duty cycle is 50 .
Platform: | Size: 261120 | Author: | Hits:

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