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Description: dds设计，花了一个星期做的,verilog写的，可生成多种波形，频率范围可上M,性能不错。-dds design, spent a week doing, verilog written, multiple waveform generation, frequency range available on the M, good performance.
Platform: |
Size: 637936 |
Author: 苏纳 |
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Description: dds设计，花了一个星期做的,verilog写的，可生成多种波形，频率范围可上M,性能不错。-dds design, spent a week doing, verilog written, multiple waveform generation, frequency range available on the M, good performance.
Platform: |
Size: 637952 |
Author: 苏纳 |
Hits:
Description: DDS FPGA 模块，实用，欢迎大家下载-DDS FPGA programmer
Platform: |
Size: 637952 |
Author: 吴小平 |
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