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[Windows Develop] dct_mac

Description: dct verilog code for image -Extra Verilog code for image
Platform: | Size: 1916 | Author: zhang chi | Hits:

[Compress-Decompress algrithms] jpeg_encoder

Description: 完整的jpeg encoder verilog code,DCT部分採用1991 IEEE transection paper,利用skew circular convolution來實現精簡電路-complete jpeg encoder Verilog code, DCT is partly based on the IEEE 1991 transection paper, using skew circular convolutions to achieve streamlining circuit
Platform: | Size: 25600 | Author: 李寧 | Hits:

[VHDL-FPGA-Verilog] 20060412183015974

Description: 是关于dct的Verilog HDL源代码和测试程序-on the Verilog HDL source code and testing procedures
Platform: | Size: 30720 | Author: 凌风 | Hits:

[Windows Develop] dct_mac

Description: dct verilog code for image -Extra Verilog code for image
Platform: | Size: 2048 | Author: zhang chi | Hits:

[Compress-Decompress algrithms] 601792346200732319490634862

Description: jpeg压缩中的DCT蝶型算法verilog代码-jpeg DCT compression algorithm verilog code BUTTERFLY
Platform: | Size: 5120 | Author: wuguanying | Hits:

[Special Effects] DCTofJPEG

Description: 用verilog代码写的JPEG压缩核心模块DCT变换之蝶形单元算法-verilog code written using JPEG compression core module DCT's butterfly modules algorithm
Platform: | Size: 1024 | Author: 叶人杰 | Hits:

[Graph program] DCT-vhdl

Description: 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现-This is a two-dimensional 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realize
Platform: | Size: 10240 | Author: liujl | Hits:

[VHDL-FPGA-Verilog] DCT

Description: 用verilog语言实现DCT编解码 附有DCT的说明-Using Verilog language realize DCT codec with a description of DCT
Platform: | Size: 65536 | Author: 周韧研 | Hits:

[VHDL-FPGA-Verilog] dct

Description: 离散余弦变换的verilog源代码，经过验证可实现-Discrete cosine transform of Verilog source code can be verified
Platform: | Size: 27648 | Author: 罗伟 | Hits:

[VHDL-FPGA-Verilog] DCT_1D

Description: 一维DCT变换的verilog源码，可用于JPEG算法优化的参考。程序中用到的算法称为“扭卷积”，可参考相关IEEE paper-One-dimensional DCT transform Verilog source code can be used to optimize the JPEG algorithm reference. Procedures used in the algorithm known as the
Platform: | Size: 54272 | Author: 楚天 | Hits:

[SCM] dct_source_code

Description: DCT source code,verilog代码。有兴趣的可以参考下。-DCT source code, verilog code. Interested can refer to the next.
Platform: | Size: 26624 | Author: 小步 | Hits:

[VHDL-FPGA-Verilog] 8x8DCT

Description: 8x8DCT verilog code 一次輸入8個點-8x8DCT verilog code once the importation of eight points
Platform: | Size: 8416256 | Author: Emuil | Hits:

[VHDL-FPGA-Verilog] 8x8IDCT

Description: 8x8 iDCT verilog code 一次輸入八個點-8x8 iDCT verilog code once the importation of eight points
Platform: | Size: 8303616 | Author: Emuil | Hits:

[VHDL-FPGA-Verilog] main_dct

Description: verilog code for dct
Platform: | Size: 2048 | Author: dheeru | Hits:

[VHDL-FPGA-Verilog] xapp610

Description: Verilog code for 2D-DCT with detailed documentation.
Platform: | Size: 128000 | Author: whitestone | Hits:

[source in ebook] 63535312DCTofJPEG

Description: 用verilog代码实现JPEG压缩编码过程中的DCT模块，用移位加法实现了乘法-Verilog code using JPEG compression encoding process to achieve the DCT module, with the shift to achieve the multiplication addition
Platform: | Size: 2048 | Author: jiang | Hits:

[mpeg mp3] mpeg2_idct_hw

Description: 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
Platform: | Size: 10801152 | Author: 陳伯綸 | Hits:

[Compress-Decompress algrithms] DCTPROGRAM.ZIP

Description: it is verilog code for two dimentional dct
Platform: | Size: 18432 | Author: suhu | Hits:

[VHDL-FPGA-Verilog] DCT_IDCT

Description: verilog code for DCT and IDCT (JPEG)
Platform: | Size: 63488 | Author: Dang Tien Dat | Hits:

[VHDL-FPGA-Verilog] verilog dct

Description: 其使用模块的代码风格来编写，能够8点dct的转换(Its use of the module's code style to write, to 8 dct conversion)
Platform: | Size: 34816 | Author: 未曾走远 | Hits:
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