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[Other resource] 基于CORDIC算法的FFT

Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。-time selected by using the four-situ algorithm and coordinate rotation digital computer (CORDIC) algorithm is one is a real-time FFT spectrum analysis system.
Platform: | Size: 2399 | Author: 张志华 | Hits:

[Software Engineering] fftfpga

Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
Platform: | Size: 390425 | Author: yaoming | Hits:

[VHDL-FPGA-Verilog] 基于CORDIC算法的FFT

Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。-time selected by using the four-situ algorithm and coordinate rotation digital computer (CORDIC) algorithm is one is a real-time FFT spectrum analysis system.
Platform: | Size: 2048 | Author: 张志华 | Hits:

[Software Engineering] fftfpga

Description: 采用按时间抽选的基4原位算法和坐标旋转数字式计算机（CORDIC）算法实现了一个FFT实时谱分析系统。整个设计采用流水线工作方式，保证了系统的速度，避免了瓶劲的出现；整个系统采用FPGA实现，实验表明，该系统既有DSP器件实现的灵活性又有专用FFT芯片实现的高速数据吞吐能力，可以广泛地应用于数字信号处理的各个领域。-time selected by using the in-situ-4 algorithm and coordinate rotation digital computer (CORDIC) algorithm is is a real-time FFT spectrum analysis system. The whole design flow work, to make sure that the speed of the system is to avoid the emergence of fresh bottle; the entire system using FPGA, the experiments show that The system established DSP device with the flexibility of dedicated FFT chips to achieve high-speed data throughput. can be widely applied to the digital signal processing in various fields.
Platform: | Size: 390144 | Author: yaoming | Hits:

[VHDL-FPGA-Verilog] CoreCORDIC_EV_v2[1].0

Description: 快速fft核,下吧!从国外网站当的！用用看！-Fast fft nuclear, under the bar! From abroad when the site! By using look!
Platform: | Size: 1503232 | Author: | Hits:

[VHDL-FPGA-Verilog] CORDIC

Description: 介绍了CORDIC数字计算机的设计，采用的是verilogHDL,在modelsim上可以实现仿真验证，压缩包中包含CORDIC的工作结构图，比较详细-Introduced the CORDIC digital computer design, using the verilogHDL, can be achieved on the ModelSim simulation, compressed package that contains the work of CORDIC structure diagram, a more detailed
Platform: | Size: 141312 | Author: yaoyongshi | Hits:

[VHDL-FPGA-Verilog] cfft

Description: CFFT是一个数据宽度和点数都可配置的基4 FFT core,用VHDL实现-CFFT is a data width and the base points can be configured 4 FFT core, using VHDL realize
Platform: | Size: 168960 | Author: | Hits:

[Software Engineering] TheResearchoftherealtimesignalprocessingofSARbased

Description: 3．完成系统的FPGA程序开发与调试，主要包括FFT，IFFT，CMUL和转置 存储控制等模块，在此基础上，重点介绍了一种基于DDR SDRAM的行写行读高 效转置存储算法，在采用该算法进行转置存储操作时，读写两端的速度相匹配， 满足流水线操作要求，提高了整个系统的实时性。最后介绍了采用CORDIC算法 实现复图像求模运算的方法，分析了算法的硬件实现结构，并给出了基于FPGA 的实现方法及仿真结果。-he FPGA s development and debugging are implemented,including FFT, IFFT, CMUL and C0ntrol of CTM．Based Oll this，Implementation of a high efficient corner turn memory arithmetic with writing and reading by row based on DDR SDRAM is introduced．When using CTM with this algorithm，me speed of reading and writing maItches and meets the requirement of pipelined operation．Finally a method of model implementation for complex image based on CORDIC algorithm is introduced．The algorithm’s hardware implementation structure is analysed, and implementation methodology and simulation results are given
Platform: | Size: 5155840 | Author: mabeibei | Hits:

[VHDL-FPGA-Verilog] cFFT

Description: CFFT is a radix-4 fast Fourier transform (FFT) core with configurable data width and a configurable number of sample points in the FFT. Twiddle factors are implemented using the CORDIC algorithm, causing the gain of the CFFT core to be different from the standard FFT algorithm. This variation in gain is not important for orthogonal frequency division modulation (OFDM) and demodulation. The gain can be corrected, to that of a conventional FFT, by applying a constant multiplying factor.
Platform: | Size: 183296 | Author: Nagendran | Hits:

[Documents] fft

Description: fft AND ifft is designed for OFDM application using CORDIC algorithm and implemented in XILINX FPGA.
Platform: | Size: 206848 | Author: pert | Hits:

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