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[Other resource] an499_design_example

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。
Platform: | Size: 433012 | Author: 王可见 | Hits:

[Other resource] an499_CN

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。 pdf 的说明文件
Platform: | Size: 192535 | Author: 王可见 | Hits:

[Other] EPM570实验指导和使用说明

Description: 此文档是CPLD EPM570 的详细学习文档，对从事veriolog编程的人员有很大的帮助！
Platform: | Size: 2264919 | Author: wanghong_4311@sina.com | Hits:

[VHDL-FPGA-Verilog] motorcontrol_cpld

Description: 在ALTERA公司的EPM570上实现的电机脉冲算法，编码器反馈技术算法，已实际应用。-EPM570 in ALTERA
Platform: | Size: 1170432 | Author: Xinzhong.Ding | Hits:

[VHDL-FPGA-Verilog] an499_design_example

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。-CPLD control 8-32M sdram controller maxII epm570 realize.
Platform: | Size: 433152 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] an499_CN

Description: cpld 控制 8-32M sdram 控制器 maxII epm570实现。 pdf 的说明文件-CPLD control 8-32M sdram controller maxII epm570 realize. pdf documentation
Platform: | Size: 192512 | Author: 王可见 | Hits:

[VHDL-FPGA-Verilog] epm570-2

Description: cpld使用手册，相信芯片资料介绍，一本不可多得的资料说明-cpld manual, I believe that chip materials, a rare information
Platform: | Size: 856064 | Author: feng | Hits:

[VHDL-FPGA-Verilog] EPM570

Description: 这是ATLREA的EPM570的一个144管脚CPLD的最小系统图，对于设计CPLD的板子有作用-This is the EPM570 ATLREA a minimum of 144 pin CPLD system diagram, for the design of the board has the role of CPLD
Platform: | Size: 340992 | Author: yuanzengquan | Hits:

[VHDL-FPGA-Verilog] JTAG_CPLD_project_1.pdf

Description: JTAG_CPLD_project source VHDL code ，适用于开发JTAG接口。此工程使用Altera EPM570 MAX II CPLD，包含硬件和软件描述。-JTAG_CPLD_project source VHDL code, suitable for the development of the JTAG interface. This project using the Altera EPM570 MAX II CPLD, includes hardware and software description.
Platform: | Size: 1273856 | Author: Jeff_Cai | Hits:

[OS Develop] EPM570

Description: 非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门-Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start
Platform: | Size: 7587840 | Author: chen | Hits:

[VHDL-FPGA-Verilog] sdr_sdram_epm570

Description: CPLD芯片EPM570对SDRAM的读写操作，通过串口显示。-SDRAM write and read test based on CPLD chip-- EPM570.
Platform: | Size: 1086464 | Author: 黄成林 | Hits:

[VHDL-FPGA-Verilog] sdram_epm570_uart

Description: 基于CPLD芯片EPM570的verilog hdl串口程序-the UART verilog hdl code based on CPLD chip-- EPM570
Platform: | Size: 1337344 | Author: 黄成林 | Hits:

[VHDL-FPGA-Verilog] spi1

Description: 使用verilog语言编写的实现cpld EPM570与EEPROM的SPI通信-Using verilog language to achieve cpld EPM570 SPI communication with the EEPROM
Platform: | Size: 2048 | Author: LJL | Hits:

[VHDL-FPGA-Verilog] decoder38

Description: 38译码器源码VHDL版， cpld EPM570版-38 decoder VHDL source code version
Platform: | Size: 114688 | Author: HAM | Hits:

[VHDL-FPGA-Verilog] syn_cnter_4

Description: 四位计数器，VHDL版，基于cpld EPM570芯片-The four bit counter, VHDL version, EPM570 chip based on CPLD
Platform: | Size: 157696 | Author: HAM | Hits:

[VHDL-FPGA-Verilog] example16-dac7512-sina-wave-ok

Description: VHDL 基于cpld EPM570的DA转换代码-VHDL CPLD EPM570 the DA conversion code based on
Platform: | Size: 284672 | Author: HAM | Hits:

[VHDL-FPGA-Verilog] 1705

Description: 用于驱动东芝的CCD芯片 1705，硬件是EPM570(drive CCD 1705 from Toshiba)
Platform: | Size: 473088 | Author: yymj | Hits:

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