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[Windows DevelopVHDLgdewrrrrrrrrrrrr

Description: 本设计中选用目前应用较广泛的VHDL硬件电路描述语言,实现对路口交通灯系统的控制器的硬件电路描述,通过编译、仿真,并下载到CPLD器件上进行编程制作,实现交通灯系统的控制过程。EDA技术是用于电子产品设计中比较先进的技术,可以代替设计者完成电子系统设计中的大部分工作,而且可以直接从程序中修改错误及系统功能而不需要硬件电路的支持,既缩短了研发周期,又大大节约了成本,受到了电子工程师的青睐。实现路口交通灯系统的控制方法很多,可以用标准逻辑器件、可编程序控制器PLC、单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持,在一定程度上增加了功能修改及系统调试的困难。因此,在设计中采用EDA技术,应用目前广泛应用的VHDL硬件电路描述语言,实现交通灯系统控制器的设计,利用MAXPLUSⅡ集成开发环境进行综合、仿真,并下载到CPLD可编程逻辑器件中,完成系统的控制作用。-the current design was chosen over a wide range of VHDL hardware description language circuit. Implementation of traffic lights at the junction of the controller hardware circuit description, compiler, simulation, to download and CPLD programming on production, traffic signal system to achieve the control process. EDA technology is used to design electronic products more advanced technology, designers can replace the complete electronic system design most of the work, but can directly from the process to amend the mistakes and system functions without the need for hardware circuits of support, both to shorten the development cycle, another significant cost savings by the electronic engineers of all ages. Achieving junction traffic signal system control many ways, using standard logic devic
Platform: | Size: 4096 | Author: jazvy | Hits:

[VHDL-FPGA-Verilogfpgalcddriver

Description: 基于FPGA液晶控制器设计与实现,采用VHDL硬件描述语言。-FPGA-based LCD controller design and implementation using VHDL hardware description language.
Platform: | Size: 92160 | Author: 张杰 | Hits:

[VHDL-FPGA-Verilogseg7_1

Description: 用VHDL描述一个让6个数码管同时显示的控制器,同时显示0、1、2、3、4、5这6个不同的数字图形到6个数码管上,输入时钟调节频率,使得能够观察到稳定显示的6个数字。可异步复位-Using VHDL description of a six digital tube display controller at the same time, also showed that six different 0,1,2,3,4,5 digital graphics to six digital tube, the input clock frequency adjustment, making it possible to observe the to the stability shown in figure 6. Can be asynchronous reset
Platform: | Size: 1024 | Author: wx | Hits:

[Othersd_IP

Description: SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core. Good luck-SD card controller can just read data using 1 bit SD mode.I have written this core for NIOS2 CPU, Cyclone, but I think it can workswith other FPGA or CPLD. Better case for this core is SD clock = 20 MHz andCPU clock = 100 MHz (or in the ratio 1:5). If you have a wish you can achieve this core.Good luck
Platform: | Size: 8192 | Author: tuya | Hits:

[VHDL-FPGA-Verilogoc_i2c_master

Description: 用VHDL制作的I2C控制器,是一个component,之间添加就可以使用。-VHDL produced using I2C controller, is a component, you can use to add between.
Platform: | Size: 386048 | Author: 辛小怡 | Hits:

[Embeded-SCM DevelopI2C

Description: 实现基于Avalon总线架构的I2C控制器!可实现OV7620等数字摄像头的配置功能!-The I2C controller based on Avalon bus architecture! OV7620 can be achieved, such as the configuration of digital camera features!
Platform: | Size: 10240 | Author: 田联 | Hits:

[VHDL-FPGA-VerilogSDRAMcontrollor

Description: SDRAM控制器,以下是我用VHDL编写SDRAM Controller的全部资料。文档提供的SDRAM控制器能工作在125MHz,我在实际工程中用到了120MHz,但没有再往上做测试了-SDRAM controller, the following is my SDRAM Controller using VHDL to prepare all the information. Documentation provided by SDRAM controller can work in the 125MHz, I used in the actual works of 120MHz, but did not do test in 125MHz or more
Platform: | Size: 6203392 | Author: 何宗奎 | Hits:

[Software Engineeringtetris

Description: Our project is to design and implement a Tetris game by using FPGA. Tetris a puzzle game that uses 4 square blocks joining edge to edge to form various combinations of shapes. There are 7 unique shapes. The shapes are controlled with the arrow keys from keypad or joystick. Both keypad and joystick are used to control the rotation of the shape. The reason we use both keypad and joystick as controller tool is that the players can have two options to control the game conveniently. However, we may use either keypad or joystick in our presentation to make the best effect. -Our project is to design and implement a Tetris game by using FPGA. Tetris is a puzzle game that uses 4 square blocks joining edge to edge to form various combinations of shapes. There are 7 unique shapes. The shapes are controlled with the arrow keys from keypad or joystick. Both keypad and joystick are used to control the rotation of the shape. The reason we use both keypad and joystick as controller tool is that the players can have two options to control the game conveniently. However, we may use either keypad or joystick in our presentation to make the best effect.
Platform: | Size: 5120 | Author: krishna | Hits:

[Other68013

Description: 介绍了此控制器与FPGA接口的控制和HDL (硬件描述语言)实现方法。利用CY7C68013控制器的 Slave F IFO从机方式,用Verilog HDL在FPGA中产生相应的控制信号,实现对数据的快速读写。试验 结果表明此方案传输速度快、数据准确,可扩展到其他需要通过USB进行快速数据传输的系统中-This paper describes the controller and the FPGA interface to control and HDL (hardware description language) implementations. Use CY7C68013 controller Slave F IFO slave mode, using Verilog HDL in the FPGA generate a corresponding control signal to achieve fast read and write data. The results show that this program transmission speed, accurate data can be expanded to other needs through the USB for fast data transfer system
Platform: | Size: 365568 | Author: 余岳衡 | Hits:

[Internet-Networkmac_controller

Description: 用verilog编写实现的以太网控制器(MAC)源码,解压后用ISE打开工程即可。-Prepared using verilog implementation Ethernet Controller (MAC) source code, open the project after decompression can be used ISE.
Platform: | Size: 142336 | Author: 陈阳 | Hits:

[VHDL-FPGA-Verilogtrafficcontroller

Description: 该程序为一个路口交通灯的控制器程序,采用VHDL编程,可在FPGA上实现-The program is an intersection traffic light controller program, using VHDL programming can be implemented on FPGA
Platform: | Size: 2390016 | Author: 姜丹 | Hits:

[Software EngineeringVHDL_fire_alarm_detection

Description: vhdl source code of fire detection system/fire alarm system especially for high rise building? This among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .-vhdl source code of fire detection system/fire alarm system especially for high rise building? This is among the requirement :- according to my "fire detection system for tall building" project by using Spartan 3E FPGA, the vhdl program need to include all of dis specification:- First of all, we ll put sensor/smoke detector each floor in the tall building. 1) alarm ll activated if the sensor/smoke detector sense a fire 2)at the same time, the actuator will activate in order to control such a elevator and any other machines in the building. 3)the controller will display which floor caught by fire and the sensor/smoke detector initial or current temperature. 4)If there is false alarm, we can stop it by push the reset button .
Platform: | Size: 1024 | Author: subin | Hits:

[Otherwashing

Description: VHDL实现洗衣机控制器程序,功能描述:1. 洗衣机的工作步骤为洗衣、漂洗和脱水三个过程,工作时间分别为:洗衣20 秒,漂洗30 秒,脱水15 秒;可以单独选择其中某一项功能;2. 用显示器件显示洗衣机的工作状态,并倒计时显示每个状态的工作时间, 全部过程结束后,应提示使用者;3. 洗衣过程可以暂停,重新启动后恢复原状态;4、 可以预约洗衣时间。-VHDL controller to achieve washing procedure, function description: 1. The work steps for laundry washing, rinsing and dehydration three processes, working hours are: laundry 20 seconds, rinse for 30 seconds, dehydrated for 15 seconds can individually choose a particular function 2. using display devices display the working status of washing machine, and the countdown show the working hours of each state, all the process is finished, should prompt the user 3. laundry process can pause, restart after the restoration of the original state 4, can appointment laundry.
Platform: | Size: 61440 | Author: 雨姿 | Hits:

[VHDL-FPGA-VerilogDMX512_2_23

Description: 本系统设计利用FPGA设计了一个接在电脑串口上的一个DMX512协议的转接卡,它可以让你的电脑变成一台超强的电脑灯控制台或者调光台、LED控制器等。通过电脑软件,可以控制电脑灯或者其他DMX512协议的设备,比如LED灯、激光灯、PAR灯、DJ设备等等。 本系统还有体积小巧携带方便等特点,足够一般的娱乐场所、多功能厅、会议厅等场所使用,同时采用电脑进行灯光的控制,也可以提升工程的技术含量,显得更高科技。通过简单更改DMX模块的UART部分,还可以将串口转换usb接口,不过由于手头上的FPGA开发板没有USB接口,所以使用UART接口进行测试。 -The system design using FPGA, a serial port on the computer then a DMX512 protocol adapter, it can make your computer into a super computer console or lighting console lights, LED controller. Through computer software, can control lights or other DMX512 protocol computer equipment, such as LED lights, laser lights, PAR lamps, DJ equipment. The system also features compact, portable and so on, is sufficient for most of the entertainment, function rooms, conference rooms and other places to use, while using computer control of lighting can also enhance the project s technical content, appears to higher technology. DMX module by simply changing the UART portion can also convert usb serial interface, however, because the FPGA development board on hand no USB interface, so tests using the UART interface.
Platform: | Size: 2223104 | Author: swekey | Hits:

[VHDL-FPGA-Verilogflashcontrol

Description: 用VHDL编写的FlashM控制器,能实现Flash的读写控制及片选。-FlashM prepared using VHDL controller can achieve read and write Flash, control and chip select.
Platform: | Size: 870400 | Author: 曾强 | Hits:

[VHDL-FPGA-Veriloga-vhdl-can-controller

Description: a vhdl can controller project using vhdl programmming language-a vhdl can controller project using vhdl programmming language..
Platform: | Size: 112640 | Author: Rahul | Hits:

[VHDL-FPGA-Verilogvhdl_can_IP.tar

Description: 运用VHDL语言实现的一个CAN通信控制器IP核-Communication of a CAN controller IP core using VHDL language
Platform: | Size: 40960 | Author: 张居林 | Hits:

[Windows Develop(liftzip1

Description: (1)用VHDL实现四层电梯运行控制器。(2)电梯运行锁用一按钮代替(开锁上电),低电平可以运行,高电平不能运行。(3)每层电梯入口处设有上行、下行请求按钮,电梯内设有乘客到达层次的停站要求开关,高电电平有效。(4)有电梯所处楼层指示灯和电梯上行、下行状态指示灯。(5)电梯到达某一层时,该层指示灯亮,并一直保持到电梯到达另一层为止。电梯上行或下行时,相应状态指示灯亮。(6)电梯接收到停站请求后,每层 -(1) four-story elevator run controller using VHDL. (Unlock)- (2) The operation of the lift lock with a button instead of the low you can run, can not run high. (3) on each floor elevator at the entrance has the uplink, downlink request button, elevator equipped with stops of passengers to reach the level requirements switch, high power level. (4) elevator which floor lights and elevator uplink, downlink status indicator. (5) elevator to reach a layer, the layer of light, and has remained until the elevator to reach another level. Elevator up or down, the corresponding status indicator light. (6) The elevator receives the request of the stops in each layer
Platform: | Size: 289792 | Author: thlqt | Hits:

[VHDL-FPGA-Verilogcaidengkongzhiqi

Description: 一个使用vhdl语言设计的彩灯控制器,使彩灯(LED管)能连续发出四种以上不同的显示形式;多种花型可以自动变换,循环往复;彩灯变换的快慢节拍可以选择;具有清零开关。-A lantern controller design using vhdl language, lantern (LED tube) can continuously send more than four different display forms kinds of flowers can automatically transform, ad infinitum lanterns transform the speed of the beat can choose has cleared zero-switching.
Platform: | Size: 353280 | Author: 陈小龙 | Hits:

[VHDL-FPGA-VerilogPID-FPGA-source-code

Description: 用VHDL写的PID控制器,可以在FPGA上实现-PID controller can be written using VHDL on FPGA
Platform: | Size: 294912 | Author: Leon Zhang | Hits:
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