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[Other resourceAltera-AHDL语言设计的PCI总线Core

Description: Altera AHDL语言设计的PCI总线Core,很难得的PCI设计资料-Altera AHDL design Core PCI, the PCI is difficult to design information
Platform: | Size: 87899 | Author: CP | Hits:

[Embeded-SCM DevelopAltera AHDL语言设计的PCI总线Core

Description: Altera AHDL语言设计的PCI总线-AHDL Altera's PCI bus design
Platform: | Size: 94503 | Author: 黄晓东 | Hits:

[Other resourceAHDL

Description: AHDL基本语言,对初学者有用哈,可以对简单的电路进行设计
Platform: | Size: 2240642 | Author: chenfang | Hits:

[Other resourceahdl

Description: AHDL入门教程,对AHDL初学者具有比较大的帮助
Platform: | Size: 126870 | Author: | Hits:

[Other resourceAHDL

Description: HLD开发语言ADHL介绍。ADHL是ALTERA公司开发的硬件描述语言,也是一种较为流行的开发工具。是介绍AHDL的入门培训资料。
Platform: | Size: 328773 | Author: 王宏毅 | Hits:

[Develop ToolsAHDL

Description: AHDL逻辑器件的使用-AHDL logic devices use
Platform: | Size: 464347 | Author: 姜力 | Hits:

[Embeded-SCM Developfreecore_ahdl

Description: 免费的AHDL模块库,包括IIC控制器,DRAM控制器,UART等28个模块,AHDL源代码-free AHDL module library, including IIC controllers, DRAM controller, UART, etc. 28 modules, source code AHDL
Platform: | Size: 50176 | Author: | Hits:

[Embeded-SCM DevelopAltera AHDL语言设计的PCI总线Core

Description: Altera AHDL语言设计的PCI总线-AHDL Altera's PCI bus design
Platform: | Size: 94208 | Author: 黄晓东 | Hits:

[BooksAHDL

Description:
Platform: | Size: 463872 | Author: 姜力 | Hits:

[VHDL-FPGA-VerilogsuperSPI

Description: 用AHDL语言编写,MAXPULS开发.通信不受外部时钟速率和数据字节数目限制.-with AHDL prepared MAXPULS development. Communications from external clock rate and restriction on the number of data bytes.
Platform: | Size: 1024 | Author: 陈瑞 | Hits:

[VHDL-FPGA-VerilogAltera-AHDL语言设计的PCI总线Core

Description: Altera AHDL语言设计的PCI总线Core,很难得的PCI设计资料-Altera AHDL design Core PCI, the PCI is difficult to design information
Platform: | Size: 88064 | Author: CP | Hits:

[VHDL-FPGA-Verilogping_pang

Description: 这是用AHDL语言编写的一个PCI采集系统的逻辑源码,其中的乒乓设计思路新颖,有兴趣的朋友可以参考一下!编译环境为maxplus2-This is AHDL prepared a PCI Acquisition System logical source, the Table Tennis novel design concept, interested friends can take a look! Build environment for maxplus2
Platform: | Size: 437248 | Author: | Hits:

[Otherkeyboard590

Description: 基于max plus2的ahdl语言。这个是键盘扫描程序的ahdl。文件格式是tdf。可以扫描键盘。-based on the max plus2 ahdl language. This is the keyboard ahdl scanning procedures. File format is TDF. Scan the keyboard.
Platform: | Size: 1024 | Author: wenwen | Hits:

[Other Embeded program16V8

Description: 这是用AHDL语言即abel语言编写的逻辑可编程器件原代码!供大家参考!-This is AHDL is abel language programmable logic devices original code! For your reference!
Platform: | Size: 132096 | Author: 帅冲 | Hits:

[SCMzuihoudeyanjiu

Description: 步进电机控制,控制器,控制电机的VHDL源程序,,多平台 Digital_030423.rar - 服务器的的板在载控制器的AHDL程序,包括原理图编译,用-stepper motor control, controllers, motor control VHDL source files, and Multi-platform Digital_030423.rar-server contains the controller board in the tap procedure , including diagram compiler, and
Platform: | Size: 17408 | Author: | Hits:

[Software Engineering16QAMAHDL

Description: 16QAM调制器的AHDL语言设计与实现 很有参考增加值-16QAM modulation of AHDL Design and Implementation of great reference value
Platform: | Size: 43008 | Author: sunny_girl | Hits:

[VHDL-FPGA-VerilogAHDL

Description: AHDL基本语言,对初学者有用哈,可以对简单的电路进行设计-AHDL basic language, useful for beginners Kazakhstan, can design a simple circuit
Platform: | Size: 2240512 | Author: chenfang | Hits:

[Other Embeded programahdl

Description: AHDL入门教程,对AHDL初学者具有比较大的帮助-AHDL Tutorial for beginners with AHDL more help
Platform: | Size: 126976 | Author: | Hits:

[VHDL-FPGA-VerilogAHDL

Description: HLD开发语言ADHL介绍。ADHL是ALTERA公司开发的硬件描述语言,也是一种较为流行的开发工具。是介绍AHDL的入门培训资料。-HLD development language ADHL introduction. ADHL is ALTERA developed hardware description language, but also a more popular development tools. AHDL is the introduction of induction training information.
Platform: | Size: 328704 | Author: 王宏毅 | Hits:

[matlabAHDL

Description: AHDL语言介绍,很详细的介绍 -AHDL language introduction, a detailed explanation
Platform: | Size: 569344 | Author: daicy | Hits:
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