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[
VHDL-FPGA-Verilog
]
choosebcd
Description:
基于vhdl的BCD码转ASCII码的设计，已经经过调试，可直接使用-Vhdl code based on the BCD to ASCII code of the design, debugging has been directly used
Platform:
|
Size:
1024
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Author:
郭帅
|
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Search - ASCII_BCD Verilog