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Description: AES的Verilog实现,用于加密的算法硬件实现!-AES realize the Verilog for hardware implementation of encryption algorithms!
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Size: 69632 |
Author: 刘志刚 |
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Description: 高级加密标准AES的FPGA实现，支持128，256密钥长度格式-Advanced Encryption Standard AES, FPGA implementation to support 128,256 key length format
Platform: |
Size: 87040 |
Author: dinxj |
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