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[VHDL-FPGA-Verilog] aes

Description: 实现了AES在赛灵思器件上的加密程序 我已经调试过完全正确-Xilinx achieved in AES encryption device debugging process I have been absolutely correct
Platform: | Size: 4096 | Author: wangrui | Hits:

[Crack Hack] AES_verilog

Description: AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
Platform: | Size: 79872 | Author: 刘蕊丽 | Hits:

[VHDL-FPGA-Verilog] FPGA_128_AES_decryption

Description: 以FPGA具體實現的128-bit AES decryption，包括介紹文件以及源碼。-FPGA-based 128-bit AES decryption
Platform: | Size: 17012736 | Author: Vlog | Hits:

[Software Engineering] AES-algoritghm-code

Description: VHDL code for AES 128bit encryption
Platform: | Size: 25600 | Author: Malar vendhan P | Hits:

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