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[VHDL-FPGA-Verilog] FPGA_DDS

Description: 基于Cyclone EP1C6240C8 的AD9854 DDS的接口程序，使用FPGA来控制DDS信号的产生，从而达到高频信号产生的目的。 通过FPGA口线模拟AD9854的控制时序。 提供DDS信号波形变换、DDS频率调整、DDS内部比较器使用等功能。-Cyclone EP1C6240C8 of the AD9854 DDS-based interface program, use the FPGA to control the DDS signal generation, so as to achieve high-frequency signal generation purposes. FPGA I lines through the AD9854 analog control of timing. To provide DDS waveform transformation, DDS frequency adjustment, DDS internal comparator to use functions.
Platform: | Size: 1826816 | Author: icemoon1987 | Hits:

[VHDL-FPGA-Verilog] vhdl-ad9910

Description: ad9910 DDS板 VHDL源代码，在Cyclone II FPGA上调试通过，主要文件说明： Filename Function ----------------------------------------------------- dds_controller.vhd top entity, opcode decoding ddslib.vhd configuration,opcode definition dds_serial.vhd parallel to serial decoding fifo.vhd FIFO megafunction intance phase_register.vhd phase registers -ad9910 DDS board VHDL source code, in the Cyclone II FPGA debugging through the main file description: Filename Function----------------------------------------------------- dds_controller.vhd top entity, opcode decoding ddslib.vhd configuration, opcode definition dds_serial.vhd parallel to serial decoding fifo.vhd FIFO megafunction intance phase_register.vhd phase registers-----------------------------------------------------
Platform: | Size: 93184 | Author: bin | Hits:

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