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MUL
Description:
8-bit modified Booth s algorithm multiplier
Platform:
|
Size:
80896
|
Author:
calvin
|
Hits:
[
VHDL-FPGA-Verilog
]
booth_mul
Description:
流水式BOOTH乘法器,包含整个工程文件,用Quartus9编写打开。为8bit乘以8bit乘法器-Flow BOOTH multiplier, contains the entire project file, open with Quartus9 written. Multiplied for 8bit 8bit multiplier
Platform:
|
Size:
189440
|
Author:
郭里
|
Hits:
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