Description: verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module! Platform: |
Size: 1024 |
Author:刘庆 |
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Description: 该工程实现了一个64点FFT，verilog编写，采用R4SDF结构，通过Modelsim功能仿真，压缩包里有rtl代码，dc脚本，输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc script, the output report. Platform: |
Size: 1255424 |
Author:ShuChen |
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Description: vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project Platform: |
Size: 364544 |
Author:tejaswini |
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Description: Abstract—Power is becoming a precious resource in
modern VLSI design, even more so than area. This paper
proposes a novel architecture for modular, scalable &reusable
hybrid constant co-efficient multiplier (KCM) circuit.
Comparison is made between of kcm and multiplier. The
implementation results show a significant improvement in
performance in terms of area, power & timing. In This paper,
we propose to design an 8-point FFT using kcm instead of
complex multiplier and multiplier. Here our goal is to
implement Radix-2 8-point FFT in hardware using hardware
language (verilog) here time constraint is measured with the
help of Xilinx FPGA (Field Programmable Gate Array).
Platform: |
Size: 560128 |
Author:Bahu |
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