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[Other resource] 基于51MCU的IDE硬盘语音记录器

Description: 基于51MCU的IDE硬盘语音记录器.是使用AT89C52 2个51 MCU制作的语音记录器，在系统中不需要地址锁存器，也不需要译码器。系统设计有IDE接口，128*64 LCD接口，红外遥控，语音声卡接口。-51MCU based on the IDE drive voice recorder. AT89C52 is the use of two 51 MCU production of the voice recorder, the system need not address latch, and do not need decoder. System design IDE interface, 128 * 64 LCD interface, infrared remote control, voice interface card.
Platform: | Size: 2520496 | Author: STGAN | Hits:

[Other resource] dvbmpeg2analyser

Description: 这是本人参与实验室项目编写的实现dvb-mpeg2码流解复用中和码流相关的源代码，用c实现，dsp是ti的5416，中间用到了，计时、中断、时钟锁存寄存器设置，对于学习dsp编程很有帮助-This is my participation in the project prepared by the laboratory to achieve DVB-mpeg2 stream demultiplexing and in bitstream relevant source code, using c realized, the dsp is ti 5416, intermediate uses, timing, interrupt, clock latches register settings for learning programming helpful dsp
Platform: | Size: 9350 | Author: 卢国勋 | Hits:

[Embeded-SCM Develop] qiangdaqi

Description: 设计一个可容纳四组参赛的数字式抢答器，每组设一个按钮供抢答使用。抢答器具有第一信号鉴别和锁存功能，使除第一抢答者外的按钮不起作用；设置一个主持人“复位”按钮，主持人复位后，开始抢答，第一信号鉴别锁存电路得到信号后，用指示灯显示抢答组别，扬声器发出2—3s的音响。 设置犯规电路，对提前抢答和超时答题(例如3min)的组别鸣笛示警，并由组别显示电路显示出犯规组别。 设置一个计分电路，每组开始预置10分，由主持人记分，答对一次加1分，答错一次减1分。 -a design can accommodate four groups participating Digital Answering Machine, each with a button for Responder use. Responder is the first signal to identify and latch functions, in addition to those first Responder button ineffective; Moderator set up a "reset" button, reset moderator, began Responder, the first signal differential latch circuit signals to be used indicator shows Responder groups, loudspeakers issued 2-3s sound. Fouls circuit set to advance Responder and overtime to answer (for example, 3 min) groups warning whistle, with bands indicate foul show circuit group. Points set up a circuit, each started 10 minutes preset by the moderator points, a plus one correct answer, by a relaxation time points.
Platform: | Size: 104165 | Author: 曾国帆 | Hits:

[GUI Develop] VHDLshixuluoji

Description: 简单的12位寄存器 带三态输出的8位D寄存器：74374 简单的锁存器-simple register with 12 three-state output of eight D Register : 74374 simple latch
Platform: | Size: 1380 | Author: 赵天 | Hits:

[Other resource] 8254-373

Description: 应用373进行地址锁存的操作8254的源代码，详细情况可向作者联系 连线： A0---Q0 A1---Q1 A2---CS -373 applications for the operation address latch 8254 source code, the details of which can be linked to the authors link : A0 A1 Q0 --- --- --- CS Q1 A2
Platform: | Size: 1222 | Author: 王宇波 | Hits:

[Embeded-SCM Develop] 杜洋 IR_NEAR 红外 自动 感应 系统 锁存 式 输出

Description: - 极简电路设计高稳定性感应处理 - 无锁存和锁存双输出多种应用扩展 强光直射和家用电器的红外遥控器的环境中会有干扰，使开关自动跳变，稳定性差。于是这次我重点改进了源程序，加入了强光下、红外遥控器环境下的防干扰算法，让这个红外感应开关非常稳定，不再受任何干扰了。 另外对程序的改进，让这次的制作省去了一条导线，制作更简单，只需要单片机、红外传感器、LED指示灯、电池和面包板。HEX文件已经更新发布（IR_NEAR_V2），敬请下载仿制。 1. 利用单片机内部的ADC接收反射光数值，用程序算法避开其他光源的干扰。 2. 用开关发射LED进行双重检测，让启动和关断的临界点分开。 3. 采用20次连续检测方式，如果20次中有任何一次错误（干扰造成）都会重新检测。 4. 无锁存和锁存双输出，即可作为电灯开关也可作为感应水龙头的开关。
Platform: | Size: 17559 | Author: nyqxmfj@vip.qq.com | Hits:

[GUI Develop] VHDLshixuluoji

Description: 简单的12位寄存器 带三态输出的8位D寄存器：74374 简单的锁存器-simple register with 12 three-state output of eight D Register : 74374 simple latch
Platform: | Size: 1024 | Author: 赵天 | Hits:

[VHDL-FPGA-Verilog] verilog_latch

Description: verilog实现锁存器，共有四个文件，包含测试文件-verilog achieve latches, a total of four documents, including test paper
Platform: | Size: 1024 | Author: zzm | Hits:

[Documents] changyongdevhdl

Description: 4位乘法器,4位除法器 8位数据锁存器,8位相等比较器,带同步复位的状态 机,元件例化与层次设计,最高优先级编码器-four multipliers, dividers four eight data latches, and eight other phase comparators, synchronous reset with the state machine, the component level with the cases of design, the highest priority encoder
Platform: | Size: 11264 | Author: 刘思雄 | Hits:

[VHDL-FPGA-Verilog] 16latch

Description: 16位锁存器，此程序通过quartusII软件调试通过-Latch 16, the procedure adopted quartusII software debugging
Platform: | Size: 1024 | Author: lvliangfei | Hits:

[VHDL-FPGA-Verilog] 50vhdl

Description: 50个VHDL常用的模块，包括计数器，译码器，编码器，锁存器等等,可供参考-50 commonly used VHDL modules, including counters, decoders, encoders, latches, etc., can be used as reference
Platform: | Size: 44032 | Author: | Hits:

[Other Embeded program] ss

Description: 没有用锁存器来做的动态数码管显示。 用c语言写的89c51， 有proteus的仿真-Latches do not use dynamic digital tube display. Written by c language 89c51, there Proteus Simulation
Platform: | Size: 19456 | Author: xingnaipeng | Hits:

[VHDL-FPGA-Verilog] dff

Description: 用vhdl编写的D触发器，锁存器等，不需帐号就可自由下载此源码-VHDL prepared using D flip-flops, latches and so on, no account can be a free download this source
Platform: | Size: 1024 | Author: daniel | Hits:

[VC/MFC] b739901b-a616-4df0-ad50-405b82f20f2a

Description: verlog语言的试验上机，有锁存器，寄存器等等的代码。可以eda仿真-verlog language tests on machines, there are latches, registers, etc. code. Can EDA Simulation
Platform: | Size: 293888 | Author: tim | Hits:

[VHDL-FPGA-Verilog] singt

Description: 用VHDL语言描述的用锁存器，加法计数器，ROM存储器构成的RTL图-VHDL language used to describe the use of latches, adding counters, ROM memory map consisting of RTL
Platform: | Size: 340992 | Author: 王洁 | Hits:

[VHDL-FPGA-Verilog] fd32_c

Description: 32位数据锁存器，用于数据锁存，测试可用，实际使用过-latch，32bits.
Platform: | Size: 1024 | Author: 吴次仁 | Hits:

[SCM] suocunqivhdl

Description: 这是关于锁存器的vhdl语言。。大家相互交流-This is the latch on the vhdl language. . We each other. .
Platform: | Size: 3072 | Author: 于振雨 | Hits:

[Other] Exp301

Description: 这是一个D锁存器完整文件，打开quartus2运行即可(This is a complete file of the D latch, open the quartus2 to run)
Platform: | Size: 7461888 | Author: 瓜皮233 | Hits:

[ERP-EIP-OA-Portal] 进销存系统源码（四套不同的）

Description: 四套进销存管理系统源码,适合初学者练习开发使用(four Source Codes of Purchase, Sale and Inventory Management System)
Platform: | Size: 5257216 | Author: 格林卡 | Hits:

[Other] 电子密码锁

Description: （1）主要任务是产生一个开锁信号，而开锁信号的形成条件是输入代码和已设置的密码相同。实现这种功能的电路构思有多种。比如：用2片8位数据锁存器或2片4位寄存器，一片存入开锁的代码，另一片存入密码，通过比较的方法判断，若二者相等，则形成开锁信号。 （2）在产生开锁信号后，要求输出声、光信号。其中音响的产生可以由开锁信号去触发一个音响电路。其中的光信号可以用开锁信号点亮LED指示灯。 （3）用按钮开关的第一个动作信号触发一个5S的定时器，若在5S内未将锁打开，则电路进入自锁状态，使之无法再打开，并由扬声器发出持续10秒的报警信号。((1) The main task is to generate a unlocking signal, and the formation condition of unlocking signal is that the input code and the set password are the same. There are many circuit ideas to realize this function. For example, if two 8-bit data latches or two 4-bit registers are used, one will store the unlocking code and the other will store the password. If they are equal, the unlocking signal will be formed. (2) After the unlocking signal is generated, it is required to output acoustic and optical signals. The generation of sound can trigger a sound circuit by unlocking signal. The light signal can be used to turn on the LED indicator with the unlocking signal. (3) Use the first action signal of the button switch to trigger a 5S timer. If the lock is not opened within 5S, the circuit will enter the self-locking state, so that it cannot be opened again, and the speaker will send an alarm signal lasting for 10 seconds.)
Platform: | Size: 377856 | Author: 刘贤瑜 | Hits:
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